summaryrefslogtreecommitdiffstats
path: root/src/compiler/nir
Commit message (Expand)AuthorAgeFilesLines
* util: Add and use util_is_power_of_two_nonzeroIan Romanick2018-03-292-10/+5
* nir: add support for min/max/median of 3 srcsDave Airlie2018-03-291-0/+14
* nir: add bindless to nir dataTimothy Arceri2018-03-281-0/+6
* nir/intrinsics: Don't report negative dest_componentsJason Ekstrand2018-03-271-1/+1
* nir: fix crash in loop unroll corner caseTimothy Arceri2018-03-281-5/+12
* nir: fix generated nir_intrinsics.c for MSVCRob Clark2018-03-271-0/+4
* nir: mako all the intrinsicsRob Clark2018-03-278-616/+697
* nir: fix per_vertex_output intrinsicRob Clark2018-03-271-1/+1
* nir: Don't condition 'a-b < 0' -> 'a < b' on is_not_used_by_conditionalIan Romanick2018-03-262-18/+1
* glsl_types: vec8/vec16 supportRob Clark2018-03-252-2/+6
* nir: Rename image intrinsics to image_varJason Ekstrand2018-03-232-23/+23
* nir: autotools, meson: add GLSL.ext.AMD.h in the files listJuan A. Suarez Romero2018-03-221-0/+1
* nir: add frexp_exp and frexp_sig opcodesTimothy Arceri2018-03-221-0/+3
* nir: Migrate nir_dce to instr worklistThomas Helland2018-03-211-35/+18
* nir: Initial implementation of a nir_instr_worklistThomas Helland2018-03-211-0/+67
* nir/dead_cf: also remove useless ifsCaio Marcelo de Oliveira Filho2018-03-211-14/+30
* nir/dead_cf: rephrase definition of a dead loop nodeCaio Marcelo de Oliveira Filho2018-03-211-8/+7
* st/nir: fix atomic lowering for gallium driversTimothy Arceri2018-03-202-6/+12
* st/nir/radeonsi: move nir_lower_uniforms_to_ubo() to the state trackerTimothy Arceri2018-03-203-99/+0
* nir: Don't compare b2f or b2i with zeroIan Romanick2018-03-191-0/+5
* nir: add nir_opt_move_load_ubo() optimization passSamuel Pitoiset2018-03-163-0/+120
* compiler: int8/uint8 supportKarol Herbst2018-03-141-0/+4
* nir: lower_load_const_to_scalar fix for 8/16b typesRob Clark2018-03-131-4/+15
* nir/subgroups: Add lowering for vote_ieq/vote_feq to a ballotJason Ekstrand2018-03-132-0/+49
* nir: Don't i2b a value that is already BooleanIan Romanick2018-03-081-0/+1
* nir: Narrow some dot product operationsIan Romanick2018-03-081-0/+8
* spirv: handle AMD_gcn_shader extended instructionsDaniel Schürmann2018-03-071-0/+1
* nir: add AMD_gcn_shader extended instructionsDaniel Schürmann2018-03-072-0/+30
* nir: Add a helper for getting binop identitiesJason Ekstrand2018-03-072-0/+70
* nir: Add subgroup arithmetic reduction intrinsicsJason Ekstrand2018-03-074-0/+34
* nir: Add quad operations and loweringJason Ekstrand2018-03-073-0/+44
* nir: Add subgroup shuffle intrinsics and loweringJason Ekstrand2018-03-073-3/+69
* nir/lower_subgroups: Add scalarizing for vote_eqJason Ekstrand2018-03-071-0/+29
* nir: Generalize nir_intrinsic_vote_eqJason Ekstrand2018-03-073-3/+6
* spirv: Add initial subgroup supportJason Ekstrand2018-03-071-0/+1
* nir: Add new SPIR-V ballot intrinsics and loweringJason Ekstrand2018-03-072-0/+22
* compiler: Add two new system values for subgroupsJason Ekstrand2018-03-072-0/+9
* nir: Add new SPIR-V ballot ALU intrinsics and loweringJason Ekstrand2018-03-072-0/+76
* nir/spirv: Add support for device groupsJason Ekstrand2018-03-072-0/+7
* Revert "nir: bump loop unroll limit to 96."Timothy Arceri2018-03-071-3/+1
* nir: Simplify some comparisons like a+b < aIan Romanick2018-03-061-0/+9
* nir: Use De Morgan's Law on logic compounded comparisonsIan Romanick2018-03-061-0/+9
* nir: Replace fmin(b2f(a), b) with a bcselIan Romanick2018-03-061-0/+9
* nir: Pull b2f out of bcselIan Romanick2018-03-061-0/+1
* nir: Replace an odd comparison involving fmin of -b2fIan Romanick2018-03-061-0/+13
* nir: Mark bcsel-to-fmin (or fmax) transformations as inexactIan Romanick2018-03-061-2/+2
* nir: Recognize some more open-coded fmin / fmaxIan Romanick2018-03-061-0/+2
* nir: Silence unused parameter warnings in generated nir_constant_expressions ...Ian Romanick2018-03-021-1/+2
* nir/search: Include 8 and 16-bit support in construct_valueJose Maria Casanova Crespo2018-03-011-0/+15
* nir/search: Support 8 and 16-bit constants in match_valueJason Ekstrand2018-03-011-0/+20