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* nir/lower_clip: Fix incorrect driver loc for clipdist outputsRob Clark2019-12-041-0/+11
* nir/load_store_vectorize: fix combining stores with aliasing loads betweenRhys Perry2019-12-042-2/+16
* nir/algebraic: Rearrange bcsel sequences generated by nir_opt_peephole_selectIan Romanick2019-12-021-0/+53
* nir/algebraic: Simplify some Inf and NaN avoidance codeIan Romanick2019-12-021-0/+9
* nir/opt_peephole_select: Don't count some unary operationsIan Romanick2019-12-021-1/+15
* nir/lower_io_to_vector: don't create arrays when not neededRhys Perry2019-12-021-1/+7
* nir: Make algebraic backtrack and reprocess after a replacement.Eric Anholt2019-11-262-22/+97
* nir: Refactor algebraic's block walkEric Anholt2019-11-261-31/+31
* nir: Maintain the algebraic automaton's state as we work.Connor Abbott2019-11-262-38/+78
* nir: Add a scheduler pass to reduce maximum register pressure.Eric Anholt2019-11-253-0/+1092
* nir: add load/store vectorizer testsRhys Perry2019-11-252-0/+1763
* nir: add a load/store vectorization passRhys Perry2019-11-253-0/+1313
* nir: add nir_num_variable_modes and nir_var_mem_push_constRhys Perry2019-11-252-2/+9
* nir: no-op C99 _Pragma() with MSVCBrian Paul2019-11-231-0/+7
* nir/serialize: support any num_components for remaining instructionsMarek Olšák2019-11-231-4/+13
* nir/serialize: use 3 unused bits in intrinsic for packed_const_indicesMarek Olšák2019-11-231-11/+10
* nir/serialize: don't serialize redundant nir_intrinsic_instr::num_componentsMarek Olšák2019-11-231-6/+16
* nir/serialize: serialize writemask for vec8 and vec16Marek Olšák2019-11-231-9/+16
* nir/serialize: serialize swizzles for vec8 and vec16Marek Olšák2019-11-231-8/+43
* nir/serialize: reuse the writemask field for 2 src X swizzles of SSA ALUMarek Olšák2019-11-231-3/+33
* nir/serialize: remove up to 3 consecutive equal ALU instruction headersMarek Olšák2019-11-231-16/+65
* nir/serialize: try to pack both deref array src into 32 bitsMarek Olšák2019-11-231-5/+28
* nir/serialize: cleanup - fold nir_deref_type_var cases into switchesMarek Olšák2019-11-231-16/+19
* nir/serialize: try to put deref->var index into the unused bits of the headerMarek Olšák2019-11-231-10/+23
* nir/serialize: don't serialize mode for deref non-cast instructionsMarek Olšák2019-11-231-5/+12
* nir/serialize: don't store deref types if not neededMarek Olšák2019-11-231-4/+26
* nir/serialize: try to pack two alu srcs into 1 uint32Marek Olšák2019-11-231-21/+76
* nir/serialize: pack nir_intrinsic_instr::const_index[] betterMarek Olšák2019-11-231-5/+84
* nir/serialize: pack 1-component constants into 20 bits if possibleMarek Olšák2019-11-231-37/+135
* nir/serialize: pack load_const with non-64-bit constants betterMarek Olšák2019-11-231-2/+46
* nir/serialize: try to store a diff in var data locations instead of var dataMarek Olšák2019-11-231-15/+73
* nir/serialize: deduplicate serialized var types by reusing the last unique oneMarek Olšák2019-11-231-10/+39
* nir/serialize: don't serialize var->data for temporariesMarek Olšák2019-11-231-12/+37
* nir/serialize: pack src better and limit the object count to 1M from 1GMarek Olšák2019-11-231-33/+75
* nir/serialize: pack instructions betterMarek Olšák2019-11-231-106/+297
* nir/range_analysis: Make sure the table validation only occurs onceIan Romanick2019-11-221-38/+58
* nir/range-analysis: Add pragmas to help loop unrollingIan Romanick2019-11-221-0/+10
* nir: Add load_sampler_lod_paramaters_pan intrinsicAlyssa Rosenzweig2019-11-221-0/+4
* nir/serialize: do ctx = {0} instead of manual initializationsMarek Olšák2019-11-211-4/+2
* nir: strip as we serialize to remove the nir_shader_clone callMarek Olšák2019-11-214-133/+34
* nir: fix deref offset builderDave Airlie2019-11-221-1/+1
* vtn/opencl: add clz supportDave Airlie2019-11-221-0/+8
* nir: add 64-bit ufind_msb lowering support. (v2)Dave Airlie2019-11-222-0/+24
* spirv/nir/opencl: handle some multiply instructions.Dave Airlie2019-11-221-0/+37
* nir/validate: validate num_components on registers and intrinsicsKarol Herbst2019-11-211-8/+16
* nir/large_constants: use nir_index_vars and nir_variable::indexRhys Perry2019-11-201-12/+8
* nir: add nir_variable::index and nir_index_varsRhys Perry2019-11-202-0/+41
* nir: make nir_variable::{num_members,num_state_slots} a uint16_tRhys Perry2019-11-201-2/+2
* nir/lower_alu_to_scalar: Support lowering 8- and 16-bit reduce opsNeil Roberts2019-11-201-0/+8
* nir: Add a 8-bit bool typeNeil Roberts2019-11-202-2/+12
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