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* meson: Fix vc5 deps on the XML-generated headers.Eric Anholt2017-10-202-2/+2
| | | | | I typoed and was depending on v3d_xml.h (the gzipped xml)_, not on the v3d_packet_v33_pack.h that the compiler and QPU packing actually use.
* broadcom/vc5: Propagate vc4 aliasing fix to vc5.Eric Anholt2017-10-201-1/+1
| | | | See e5fea0d621af2b14cf6c5e364eeaf293db460f2a
* broadcom/vc5: Use SETMSF to handle discards.Eric Anholt2017-10-202-25/+12
| | | | | | | | A bit of spec text suggested that (like vc4) condition codes should be used for discards, and the simulator was fine with it, but the 7268 disagrees and you have to use SETMSF instead or the color comes through. Fixes glsl-fs-discard-01 and many of the interpolation-with-clipping tests.
* broadcom/vc5: Set the snorm/unorm packing functions to be lowered.Eric Anholt2017-10-201-0/+4
| | | | | | We don't have native instructions for them, so set up the lowering. Once we support the bfi instructions that get generated, they should start actually working.
* nir: Get rid of nir_shader::stageJason Ekstrand2017-10-203-11/+11
| | | | | | | | It's redundant with nir_shader::info::stage. Acked-by: Timothy Arceri <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* meson: Add support for the vc5 driver.Eric Anholt2017-10-173-0/+104
| | | | | | | v2: Default vc5 to off, since it requires the simulator currently. Add missing dep on the XML generation from libbroadcom_vc5. Reviewed-by: Dylan Baker <[email protected]> (v1)
* meson: Add support for the vc4 driver.Eric Anholt2017-10-172-0/+82
| | | | Reviewed-by: Dylan Baker <[email protected]>
* broadcom/vc5: Don't pair VPMSETUP with other peripheral access.Eric Anholt2017-10-121-0/+3
| | | | | The specs don't say you can't, but pairing it with an SFU write on the 7268 breaks all our simple shader tests using gl_MVP * gl_Vertex.
* broadcom/vc5: Fix inclusion of FS flag bits in dumping the FS address.Eric Anholt2017-10-121-1/+1
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* braodcom/vc5: Set up clear color for higher-bpp formats.Eric Anholt2017-10-101-0/+20
| | | | Fixes arb_color_buffer_float-clear
* broadcom/vc5: Fix Rendering Mode Common Config's color store bitmask.Eric Anholt2017-10-101-1/+1
| | | | | This controls the RTs that get stored by the default resolved store, the same way that the extended resolved store packet has a RT bitmask.
* broadcom/vc5: Add support for f32 render targets.Eric Anholt2017-10-102-13/+34
| | | | | The TLB write code is getting ugly and needs a refactoring (that will hopefully handle TLBU uniform coalescing as well).
* broadcom/vc5: Start hooking up multiple render targets support.Eric Anholt2017-10-102-14/+39
| | | | We now emit as many TLB color writes as there are color buffers.
* broadcom/vc5: Add support for GL_EXT_provoking_vertex.Eric Anholt2017-10-101-0/+1
| | | | | The bit was missing from the spec, but it's there in the simulator. Fixes the piglit clipflat test.
* broadcom/vc5: Mark our primitives as needing TF processing.Eric Anholt2017-10-101-0/+7
| | | | | The TF enable state appears to stick around until the next TF enable packet is sent, so we only want to request TF when the shader is using it.
* broadcom/vc5: Fix setup of TF dword output count.Eric Anholt2017-10-101-1/+1
| | | | I missed the "- 1" when reading the spec.
* broadcom/vc5: Fix handling of interp qualifiers on builtin color inputs.Eric Anholt2017-10-103-17/+28
| | | | | The interpolation qualifier, if specified, is supposed to take precedence over glShadeModel().
* broadcom/vc5: Fix CLIF dumping of lists that aren't capped by a HALT.Eric Anholt2017-10-102-8/+21
| | | | | | | The HW will halt when you hit a HALT packet, or when you hit the end address. Tell CLIF if there's an end address is so that it can stop correctly. (There was usually a 0 byte after the CL, so it would stop anyway).
* broadcom/vc5: Fix depth and stencil clear values.Eric Anholt2017-10-101-1/+1
| | | | | I had misread the packet description: We always have a 32f depth, and a separate u8 stencil.
* broadcom/compiler: Set up passthrough Z when doing FS discards.Eric Anholt2017-10-103-2/+15
| | | | | | | | In order to keep early-Z from writing early in a discard shader, you need to set the "modifies Z" bit in the shader state (which the new prog_data.discards will indicate). Then, in the shader we do a TLB write to make Z passthrough happen (the QPU result is ignored, so we use a NULL source).
* broadcom/compiler: Don't forget the discard state on TLB Z writes.Eric Anholt2017-10-101-0/+1
| | | | We don't want to write Z for discarded fragments.
* broadcom/compiler: Use defines instead of magic values in TLB write setup.Eric Anholt2017-10-101-6/+33
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* broadcom/xml: Add the vc5 Base Vertex/Base Instance packet.Eric Anholt2017-10-101-0/+6
| | | | This lets us do index_bias and ARB_base_instance.
* broadcom/xml: Add a bunch more vc5 tile list management packets.Eric Anholt2017-10-101-0/+60
| | | | We're going to need these for MSAA, and to use the generic per-tile list.
* broadcom/xml: Remove vc5 base packet for tile bin/render mode config.Eric Anholt2017-10-101-10/+0
| | | | | | These existed so I could unpack just the sub-id field to switch on in the old manual CLIF dumper. The new codegen handles sub-id automatically, but only if these stub packets aren't there with an implicit sub-id=0.
* braodcom/xml: Fix a pasteo in vc5 store tile buffer general.Eric Anholt2017-10-101-1/+1
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* broadcom: Add VC5 NIR compiler.Eric Anholt2017-10-1017-0/+7498
| | | | | | | | | | | This is a pretty straightforward fork of VC4's NIR compiler to VC5. The condition codes, registers, and I/O have all changed, making the backend hard to share, though their heritage is still recognizable. v2: Move to src/broadcom/compiler to match intel's layout, rename more "vc5" to "v3d", rename QIR to VIR ("V3D IR") to avoid symbol conflicts with vc4, use new v3d_debug header, add compiler init/free functions, do texture swizzling in NIR to allow optimization.
* broadcom: Add vc5 CLIF dumpingEric Anholt2017-10-103-0/+312
| | | | | | | | This will be usable with "VC5_DEBUG=cl" on the vc5 driver to stream a CLIF file (the Broadcom equivalent of i965's AUB) to stderr. I haven't tested that this is actually usable with the internal CLIF-consuming tools, but is close enough as a baseline and is useful for visually inspecting the command stream.
* broadcom: Add V3D 3.3 QPU instruction pack, unpack, and disasm.Eric Anholt2017-10-1012-0/+2774
| | | | | | | | | | | | | | | | | Unlike VC4, I've defined an unpacked instruction format with pack/unpack functions to convert to 64-bit encoded instructions. This will let us incrementally put together our instructions and validate them in a more natural way than the QPU_GET_FIELD/QPU_SET_FIELD used to. The pack/unpack unfortuantely are written by hand. While I could define genxml for parts of it, there are many special cases (like operand order of commutative binops choosing which binop is being performed!) and it probably wouldn't come out much cleaner. The disasm unit test ensures that we have the same assembly format as Broadcom's internal tools, other than whitespace changes. v2: Fix automake variable redefinition complaints, add test to .gitignore
* broadcom: Introduce a v3d_debug.h header for vc5 and broadcom Vulkan.Eric Anholt2017-10-103-0/+173
| | | | | | | Unlike vc4, where the compiler and gallium driver live together, for vc5 the compiler will live up in the shared broadcom directory, and need access to the debug flags. Define a set of debug flags and helpers there, so it can be shared between compiler, vc5, and vulkan.
* broadcom: Fix out-of-tree build include pathDaniel Stone2017-10-051-1/+3
| | | | | Reviewed-by: Eric Anholt <[email protected]> Fixes: 5b102160ae ("broadcom/genxml: Introduce a V3D packet/struct decoder.")
* broadcom/genxml: Set up enums for VC5 blending, depth, stencil, and prims.Eric Anholt2017-09-191-46/+77
| | | | | These will be used in tables in the Vulkan driver, and give us pretty CLIF dump output.
* broadcom/genxml: Add support for enum-typed fields.Eric Anholt2017-09-191-3/+13
| | | | | This basically comes from the intel genxml script. This will help improve gdb and CLIF output once we convert fields over.
* broadcom/genxml: Add V3D 3.3 packet definitions.Eric Anholt2017-08-183-0/+802
| | | | | This will be used by the new vc5 gallium driver, and a future Vulkan driver.
* broadcom/genxml: Check the sub-id field when decoding instructions.Eric Anholt2017-08-181-5/+26
| | | | | | VC5 introduces packet variants where the same opcode has behavior that is decided by a sub-id field in the early bits of the packet. Keep iterating over packets until we find the one with the matching sub-id.
* broadcom/genxml: Emit code for default headers for structs as well.Eric Anholt2017-08-181-14/+13
| | | | | | In the vc5 NIR backend, I want to use the XML code-generation to set up pack/unpack of structs for the texture uniforms, and setting up the unpacked copy needs a default header.
* broadcom: Add v3d_xml.h to gitignore.Eric Anholt2017-08-151-0/+1
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* broadcom: Add missing libexpat cflags for the decoder.Eric Anholt2017-08-151-0/+3
| | | | | The Raspbian ARMv6 cross compiler wasn't picking up my (amd64) system copy of the header the way that the system gcc and armhf cross-compile did.
* broadcom/vc4: Switch the V3D 2.1 XML over to restricted address fields.Eric Anholt2017-07-251-4/+4
| | | | | | This keeps the flags out of v3d_decode.c's output. In the generated code, only the unpack functions see any change (where they now get the restricted start value), and vc4 doesn't use the unpack functions yet.
* broadcom/genxml: Support address fields with <32 bitsEric Anholt2017-07-251-1/+1
| | | | | | | | | | I was writing the XML such that the address field overlapped various flags in the alignment bits, which caused pain when trying to unpack for decode. Instead, keep the XML matching the docs (address fields don't overlap), and just infer the appropriate shift value during decode. During pack, the address is just applied to the appropriate bits already, ignoring the sub-byte start/end fields.
* broadcom/vc4: Switch the Viewport Center fields to a fixed-point representation.Eric Anholt2017-07-251-2/+2
| | | | | | This gets us automatic CL decoding to a floating-point value, and drops a magic number from the emit code. 250x250 shader runner tests now say they have a center of 125.0 instead of 2000.
* broadcom/genxml: Introduce a V3D packet/struct decoder.Eric Anholt2017-07-259-0/+1066
| | | | | | | This is copied from Intel's XML decoder, modified to handle V3D's byte-oriented packets. v2: Squash in robher's fixes for Android
* broadcom: add editorconfigEric Anholt2017-07-251-0/+3
| | | | This is the same 8-space style used in the vc4 and vc5 gallium drivers.
* broadcom: correct header file in BROADCOM_FILESAndres Gomez2017-07-241-1/+1
| | | | | | | | | | | | | | | | This fixes `make distcheck` > make[3]: *** No rule to make target 'common/v3d_devinfo.h', needed by 'distdir'. Stop. > make[3]: Leaving directory '/home/local/mesa/src/broadcom' > Makefile:945: recipe for target 'distdir' failed > make[2]: Leaving directory '/home/local/mesa/src' > make[2]: *** [distdir] Error 1 > make[1]: *** [distdir] Error 1 Fixes: 427bbbb99c ("broadcom: Introduce a header for talking about chip revisions.") Cc: Emil Velikov <[email protected]> Signed-off-by: Andres Gomez <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* broadcom/vc4: Add more packets to the v2.1 XML.Eric Anholt2017-07-131-0/+106
| | | | These will be used to replace vc4_cl_dump.c's hand-written dumping.
* broadcom: Introduce a header for talking about chip revisions.Eric Anholt2017-07-132-0/+40
| | | | | This will be used by the VC5 driver and various shared VC4/VC5 tooling, like the XML decoder.
* broadcom/genxml: Use the same "gen" attr for HW version as Intel does.Eric Anholt2017-07-132-3/+3
| | | | This will let us reuse their tools more easily.
* broadcom/genxml: Support unpacking fixed-point fractional values.Eric Anholt2017-07-132-4/+25
| | | | | This was an oversight in the original XML support, because unpacking wasn't used much. The new XML-based CL dumper will want it, though.
* Android: Fix vc4 build since XML changes.Rob Herring2017-07-121-5/+5
| | | | | | | | | | | | | | Since commit 7f80a9ff1312 ("vc4: Introduce XML-based packet header generation like Intel's."), the vc4 build on Android is broken: out/target/product/linaro_x86_64/gen/STATIC_LIBRARIES/libmesa_broadcom_genxml_intermediates/broadcom/cle/v3d_packet_v21_pack.h:12:10: fatal error: 'v3d_packet_helpers.h' file not found external/mesa3d/src/gallium/drivers/vc4/vc4_cl_dump.c:28:10: fatal error: 'vc4_packet.h' file not found The path of the generated header needs to be fixed since we build out of tree. Acked-by: Eric Anholt <[email protected]> Signed-off-by: Rob Herring <[email protected]>
* vc4: automake: include vc4_cl_dump.h inJuan A. Suarez Romero2017-07-041-1/+1
| | | | | | | | | Ensure vc4_cl_dump.h and $(BROADCOM_FILES) are distributed in the dist-file. This fixes `make distcheck` Reviewed-by: Emil Velikov <[email protected]>
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