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* broadcom/vc5: Start using nir_opt_move_load_ubo().Eric Anholt2018-03-281-0/+2
* broadcom/vc5: Fix extraneous register index in QIR dumping of TLBU writes.Eric Anholt2018-03-261-0/+1
* broadcom/vc5: Account for InstanceID/VertexID in VPM segment size.Eric Anholt2018-03-221-4/+9
* broadcom/vc5: Set up a vertex position if the shader doesn't.Eric Anholt2018-03-221-0/+22
* broadcom/vc5: Fix up the NIR types of FS outputs generated by NIR-to-TGSI.Eric Anholt2018-03-212-0/+38
* broadcom/vc5: Don't annotate dumps with stale live intervals.Eric Anholt2018-03-194-2/+8
* broadcom/vc5: Add support for register spilling.Eric Anholt2018-03-194-11/+276
* broadcom/vc5: Remove redundant last_inst lookup.Eric Anholt2018-03-191-1/+0
* broadcom/vc5: On QPU pack error, dump the instruction and return cleanly.Eric Anholt2018-03-191-1/+7
* broadcom/vc5: Add cursors to the compiler infrastructure, like NIR's.Eric Anholt2018-03-193-8/+73
* broadcom/vc5: Move the umul macro to a header.Eric Anholt2018-03-192-8/+8
* broadcom/vc5: Correct the arg count of TIDX/EIDX.Eric Anholt2018-03-191-2/+2
* broadcom/vc5: Re-do live variables after removing thrsws.Eric Anholt2018-03-192-3/+14
* broadcom/vc5: Add a QPU helper for instructions using the TLB.Eric Anholt2018-03-192-0/+23
* broadcom/vc5: Introduce v3d_qpu_reads_vpm()/v3d_qpu_writes_vpm().Eric Anholt2018-03-192-4/+35
* broadcom/vc5: The ldvpm signal also a case of using the VPM.Eric Anholt2018-03-191-0/+3
* broadcom/vc5: Extract v3d_qpu_writes_tmu() helper.Eric Anholt2018-03-193-6/+12
* nir: add lower_ldexp to nir compiler optionsTimothy Arceri2018-02-281-0/+1
* broadcom/vc5: Fix "hardwrae" typo in a field name in XML.Eric Anholt2018-02-052-2/+2
* broadcom/vc5: Try to merge more than 2 QPU instructions together.Eric Anholt2018-02-051-5/+13
* broadcom/vc5: Remove no-op MOVs after register allocation.Eric Anholt2018-02-051-1/+60
* broadcom/vc5: Add missing shader-db instruction counting.Eric Anholt2018-02-051-0/+7
* broadcom/vc5: Fix a segfault on mix of booleans.Eric Anholt2018-02-011-1/+3
* nir: add lower_all_io_to_temps flagTimothy Arceri2018-01-311-0/+1
* broadcom/vc5: Enable CLIF dumping of V3D 4.2.Eric Anholt2018-01-273-1/+10
* broadcom/vc5: Update the compiler for V3D 4.2.Eric Anholt2018-01-271-2/+6
* broadcom/vc5: Update QPU instruction pack/unpack for v4.2.Eric Anholt2018-01-274-5/+9
* broadcom/vc5: Add XML for V3D 4.2.Eric Anholt2018-01-276-0/+1065
* broadcom/vc5: Fix a race between XML codegen build and CLIF build.Eric Anholt2018-01-271-1/+4
* Android: Attempt to fix broadcom build after vc5 changes.Eric Anholt2018-01-271-0/+5
* autotools: include meson build files in tarballDylan Baker2018-01-191-1/+6
* broadcom: add missing headers to the tarballEmil Velikov2018-01-181-2/+5
* broadcom/vc5: Use MSF to ignore discards/non-dispatched channels in loops.Eric Anholt2018-01-121-1/+5
* broadcom/vc5: Use XOR instead of SUB for execute flags comparisons.Eric Anholt2018-01-121-3/+3
* broadcom/vc5: Also check the update flags for avoiding DCE.Eric Anholt2018-01-121-1/+5
* broadcom/vc5: Rename V3D 3.x Flat Shade Action to match v4.x naming.Eric Anholt2018-01-121-3/+3
* broadcom/vc5: Add support for loading varyings in V3D 4.1.Eric Anholt2018-01-126-17/+13
* broadcom/vc5: Add compiler support for V3D 4.x texturing.Eric Anholt2018-01-127-6/+283
* broadcom/vc5: Add the new TMU write addresses for V3D 4.x (and r5rep).Eric Anholt2018-01-122-10/+37
* broadcom/vc5: Move V3D 3.3 texturing to a separate file.Eric Anholt2018-01-125-229/+267
* broadcom/vc5: Move V3D 3.3 VPM write setup to a separate file.Eric Anholt2018-01-125-34/+82
* broadcom/vc5: Add support for V3D 4.1 CLIF dumping.Eric Anholt2018-01-125-17/+57
* broadcom/vc5: Move the body of CLIF dumping to a per-version file.Eric Anholt2018-01-126-155/+255
* broadcom/vc5: Use THRSW to enable multi-threaded shaders.Eric Anholt2018-01-128-78/+285
* broadcom/vc5: Properly schedule the thread-end THRSW.Eric Anholt2018-01-122-39/+137
* broadcom/vc5: Implement GFXH-1684 workaround.Eric Anholt2018-01-124-0/+20
* broadcom/vc5: Add a test for .ifb in ADD ops.Eric Anholt2018-01-121-0/+1
* broadcom/vc5: Add the new tesselation opcodes in V3D 4.1.Eric Anholt2018-01-122-1/+5
* broadcom/vc5: Use a physical-reg-only register class for LDVPM.Eric Anholt2018-01-122-8/+21
* broadcom/vc5: Use the new LDVPM/STVPM opcodes on V3D 4.1.Eric Anholt2018-01-129-51/+197
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