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* drm-shim: Let the driver choose to overwrite the first render node.Eric Anholt2020-04-232-0/+4
| | | | | | | | | | | | | | When I was writing drm-shim, I was focused on the v3d kmsro case -- use my intel device as the kmsro display device and add on a simulator-based v3d device that we could render with. But for the noop backends we use for shader-db, it's a lot more useful to just overwrite the first render node in the system so that you don't have to pass a -d <how many render nodes I already have in my system> argument. Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4664>
* v3d: support for textureQueryLODAlejandro Piñeiro2020-04-221-26/+17
| | | | | | | | | | | | | | | | | | | Fixes all the ARB_texture_query_lod piglit tests, and needed to get the Vulkan CTS textureQueryLOD passing with the ongoing Vulkan driver. Note that LOD Query bit flag became only available on V42 of the hw, but the v3d40_tex is using V41 as reference. In order to avoid setting up the infrastructure to support both v41 and v42, we manually set the bit if the device version is the correct one. We also fix how the ARB_texture_query_lod (so EXT_texture_query_lod) is exposed. Before this commit it was always exposed (wrongly as it was not really supported). Now it is exposed for devinfo.ver >= 42. v2: move _need_sampler helper to nir.h (Eric Anholt) Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4677>
* v3d/packet: fixing TMU_Config_Parameter_2 definitionAlejandro Piñeiro2020-04-221-3/+3
| | | | | | | | v41 interchanged the size and start values for the Padding, and it seems that v42 inherited it when adding the LOD Query bit. Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4677>
* v3d/tex: Configuration Parameter 1 can be only skipped if P2 can be skipped tooAlejandro Piñeiro2020-04-221-2/+9
| | | | | | | | | | | | | Configuration Parameter packets 1 and 2 are pointed as optional, but it is not clearly stated if you can skip only P1 when P2 is needed. In the practice, it seems that the situation P0 - non-P1 - P2 can causes problems, and at least on the simulator, it seems that sampler info are attempted to be accessed. So let's just be conservative, and only skip P1 configuration if we can skip P2 configuration too. Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4677>
* v3d/tex: don't configure tmu config 1 if not neededAlejandro Piñeiro2020-04-221-27/+66
| | | | | | | | | | | | | | | | | | | TMU configuration parameter 1 configures the sampler for the texture operation. But there are some texture operations that doesn't need a sampler. Skipping the configuration could provide a small perf improvement on OpenGL. On the incoming Vulkan driver, would allow us to avoid to set up an unneeded sampler. Note that we still need to add the sampler configuration parameter if the output is a 32bit, as it is on the sampler where we configure that info. Also, note that for images this is done comparing against a unpacked p1 default. But in order to do that it is needed to go through the code that fills up the unpacked p1. We can skip that too. Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4677>
* drm-shim: return device platform as specifiedLionel Landwerlin2020-04-032-0/+2
| | | | | | | | v2: Embed the libdrm dependency inside the drm-shim dependency Signed-off-by: Lionel Landwerlin <[email protected]> Acked-by: Eric Anholt <[email protected]> (v1) Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4429>
* meson: inline `inc_common`Eric Engestrom2020-03-285-9/+9
| | | | | | | | | Let's make it clear what includes are being added everywhere, so that they can be cleaned up. Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4360>
* util/ra: spiff out select_reg_callbackRob Clark2020-03-101-1/+1
| | | | | | | | | | | | Add a parameter so the callback can know which node it is selecting a register for. And remove the graph parameter, as it is unused by existing users, and somewhat unnecessary (ie. the callback data could be used instead). And add a comment so $future_me remembers how this works. Signed-off-by: Rob Clark <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
* v3d: Ask the state tracker to lower image accesses off of derefs.Eric Anholt2020-02-243-71/+48
| | | | | | | | This saves a bunch of hassle in handling derefs in the backend, and would be needed for reasonable handling of dynamic indexing of image arrays. Reviewed-by: Kenneth Graunke <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3728>
* broadcom: Fix implicit declaration of ffs for Android buildJose Maria Casanova Crespo2020-02-061-0/+1
| | | | | | | | | | Include util/bitscan.h to ensure ffs is available when there is no glibc like in Android. Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1983 Reviewed-by: Eric Anholt <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2554> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2554>
* glsl,nir: Switch the enum representing shader image formats to PIPE_FORMAT.Eric Anholt2020-02-051-220/+63
| | | | | | | | | | | | | | | | | This means you can directly use format utils on it without having to have your own GL enum to number-of-components switch statement (or whatever) in your vulkan backend. Thanks to imirkin for fixing up the nouveau driver (and a couple of core details). This fixes the computed qualifiers for EXT_shader_image_load_store's non-integer sizeNxM qualifiers, which we don't have tests for. Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]> (v3d) Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3355> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3355>
* util/hash_table: update users to use new optimal integer hash functionsAnthony Pesch2020-01-231-13/+1
| | | | | | | Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3475> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3475>
* nir/lower_atomics_to_ssbo: Also lower barriersJason Ekstrand2020-01-131-1/+0
| | | | | | | | | | | This is more correct for a pass which is supposed to completely lower away atomic counters. It also lets us stop supporting atomic counter barriers in most of the drivers. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3307> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3307>
* nir: Rename nir_intrinsic_barrier to control_barrierJason Ekstrand2020-01-131-1/+1
| | | | | | | | This is a more explicit name now that we don't want it to be doing any memory barrier stuff for us. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3307>
* nir: Add a new memory_barrier_tcs_patch intrinsicJason Ekstrand2020-01-131-0/+1
| | | | | | | | | | | Right now, it's implemented as a no-op for everyone. For most drivers, it's a switch case in the NIR -> whatever which just breaks. For ir3, they already have code to delete tessellation barriers so we just add a case to also delete memory_barrier_tcs_patch. Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3307>
* v3d: handle writes to gl_Layer from geometry shadersIago Toral Quiroga2019-12-163-0/+53
| | | | | | | | | | | | | | | | When geometry shaders write a value to gl_Layer that doesn't correspond to an existing layer in the target framebuffer the rendering behavior is undefined according to the spec, however, there are CTS tests that trigger this scenario on purpose, probably to ensure that nothing terrible happens. For V3D, this situation is problematic because the binner uses the layer index to select the offset to write into the tile state data, and we only allocate tile state for MAX2(num_layers, 1), so we want to make sure we don't produce values that would lead to out of bounds writes. The simulator has an assert to catch this, although we haven't observed issues in actual hardware it is probably best to play safe. Reviewed-by: Alejandro Piñeiro <[email protected]>
* v3d: predicate geometry shader outputs inside non-uniform control flowIago Toral Quiroga2019-12-161-0/+15
| | | | Reviewed-by: Alejandro Piñeiro <[email protected]>
* v3d: we always have at least one output segmentIago Toral Quiroga2019-12-161-1/+1
| | | | | | | | | | If we program an output size of 0 the simulator asserts. This was not a problem until now because our VS would always have to emit fixed function outputs, however, now that it can be paired with a GS we can end up with a VS shader that no longer emits any outputs. Reviewed-by: Alejandro Piñeiro <[email protected]>
* v3d: compute appropriate VPM memory configuration for geometry shader workloadsIago Toral Quiroga2019-12-162-0/+25
| | | | | | | | | | | | | | | | | | | | Geometry shaders can output many vertices and thus have higher VPM memory pressure as a result. It is possible that too wide geometry shader dispatches exceed the maximum available VPM output allocated, in which case we need to reduce the dispatch width until we can fit the VPM memory requirements. Supported dispatch widths for geometry shaders are 16, 8, 4, 1. There is a limit in the number of VPM output sectors that can be used by a geometry shader that we can meet by lowering the dispatch width at compile time, however, at draw time we need to revisit this number and, together with other elements that can contribute to total VPM memory requirements, decide on a configuration that can fit the program into the available VPM memory. Ideally, we also want to aim for not using more than half of the available memory so we that we can run a pair of bin and render programs in parallel. v2: fixed language in comment and typo in commit log. (Alejandro) Reviewed-by: Alejandro Piñeiro <[email protected]>
* v3d: add 1-way SIMD packing definitionIago Toral Quiroga2019-12-161-0/+1
| | | | | | | According to the documentation, the 1-way dispatch width is only supported with geometry shaders. Reviewed-by: Alejandro Piñeiro <[email protected]>
* v3d: implement geometry shader instancingIago Toral Quiroga2019-12-163-0/+9
| | | | | | | v2: - Remove unused field uses_iid from v3d_gs_prog_data (Alejandro) Reviewed-by: Alejandro Piñeiro <[email protected]>
* v3d: fix packet descriptions for geometry and tessellation shadersIago Toral Quiroga2019-12-161-10/+30
| | | | | | | | | | | | | | | | | | | | Every code address starts at bit 3 (addresses must be 64-bit aligned), with the first 3 bits used to specify threading and NaN propagation parameters for the shader program. We generally skip "reserved" bits, however, doing this when the reserved field is the last in a struct and it is large enough can make us compute incorrect (smaller) struct sizes which can lead to corrupt CLs. In particular, the "Tess/Geom Common Params" struct has a reserved field at the end that is 8-bit, so if we don't include this we compute a packet size that is 1 byte smaller than it shold, making the next packet we emit start 1 byte earlier and therefore leading to incorrect CL data from that point forward. The name of one of the fields was not correct. Reviewed-by: Alejandro Piñeiro <[email protected]>
* v3d: add initial compiler plumbing for geometry shadersIago Toral Quiroga2019-12-165-79/+610
| | | | | | | | | | | | | | | | | | | | | | | | | | | Most of the relevant work happens in the v3d_nir_lower_io. Since geometry shaders can write any number of output vertices, this pass injects a few variables into the shader code to keep track of things like the number of vertices emitted or the offsets into the VPM of the current vertex output, etc. This is also where we handle EmitVertex() and EmitPrimitive() intrinsics. The geometry shader VPM output layout has a specific structure with a 32-bit general header, then another 32-bit header slot for each output vertex, and finally the actual vertex data. When vertex shaders are paired with geometry shaders we also need to consider the following: - Only geometry shaders emit fixed function outputs. - The coordinate shader used for the vertex stage during binning must not drop varyings other than those used by transform feedback, since these may be read by the binning GS. v2: - Use MAX3 instead of a chain of MAX2 (Alejandro). - Make all loop variables unsigned in ntq_setup_gs_inputs (Alejandro) - Update comment in IO owering so it includes the GS stage (Alejandro) Reviewed-by: Alejandro Piñeiro <[email protected]>
* v3d: remove unused variableIago Toral Quiroga2019-12-161-4/+1
| | | | Reviewed-by: Alejandro Piñeiro <[email protected]>
* v3d: enable debug options for geometry shader dumpsIago Toral Quiroga2019-12-162-10/+12
| | | | Reviewed-by: Alejandro Piñeiro <[email protected]>
* v3d: add debug assertIago Toral Quiroga2019-12-161-0/+1
| | | | | | | | While lowering vpm outputs we look for the NIR variables matching particular store output instructions and we expect to find a match, so assert on that. Reviewed-by: Alejandro Piñeiro <[email protected]>
* v3d: add missing plumbing for VPM load instructionsIago Toral Quiroga2019-12-162-0/+7
| | | | | | | We will need to use LDVPMG_IN specifically to read VPM inputs in geometry shaders. Reviewed-by: Alejandro Piñeiro <[email protected]>
* meson/broadcom: libbroadcom_cle also needs zlibDylan Baker2019-12-111-1/+1
| | | | | | Fixes: 1ae8018a6af81eec4832a57d9d0346aa3dd98d28 ("meson: Add support for the vc4 driver.") Reviewed-by: Eric Anholt <[email protected]>
* meson/broadcom: libbroadcom_cle needs expat headersDylan Baker2019-12-101-1/+1
| | | | | | Fixes: 1ae8018a6af81eec4832a57d9d0346aa3dd98d28 ("meson: Add support for the vc4 driver.") Reviewed-by: Eric Anholt <[email protected]>
* nir: Add a scheduler pass to reduce maximum register pressure.Eric Anholt2019-11-251-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | This is similar to a scheduler I've written for vc4 and i965, but this time written at the NIR level so that hopefully it's reusable. A notable new feature it has is Goodman/Hsu's heuristic of "once we've started processing the uses of a value, prioritize processing the rest of their uses", which should help avoid the heuristic otherwise making such systematically bad choices around getting texture results consumed. Results for v3d: total instructions in shared programs: 6497588 -> 6518242 (0.32%) total threads in shared programs: 154000 -> 152828 (-0.76%) total uniforms in shared programs: 2119629 -> 2068681 (-2.40%) total spills in shared programs: 4984 -> 472 (-90.53%) total fills in shared programs: 6418 -> 1546 (-75.91%) Acked-by: Alyssa Rosenzweig <[email protected]> (v1) Reviewed-by: Alejandro Piñeiro <[email protected]> (v2) v2: Use the DAG datastructure, fold in the scheduling-for-parallelism patch, include SSA defs in live values so we can switch to bottom-up if we want. v3: Squash in improvements from Alejandro Piñeiro for getting V3D to successfully register allocate on GLES3.1 dEQP. Make sure that discards don't move after store_output. Comment spelling fix.
* v3d: adds an extra MOV for any sig.ld*Alejandro Piñeiro2019-11-201-4/+19
| | | | | | | | | | | | | | | | | | | | | | | | Specifically when we are in non-uniform control flow, as we would need to set the condition for the last instruction. If (for example) a image atomic load stores directly their value on a NIR register, last_inst would be a nop, and would fail when set the condition. Fixes piglit test: spec/glsl-es-3.10/execution/cs-ssbo-atomic-if-else-2.shader_test Fixes: 6281f26f064ada ("v3d: Add support for shader_image_load_store.") v2: (Changes suggested by Eric Anholt) * Cover all sig.ld* signals, not just ldunif and ldtmu, as all of them have the same restriction. * Update comment explaining why we add a MOV in that case * Tweak commit message. v3: * Drop extra set of parens (Eric) * Add missing ld signal to is_ld_signal to fix shader-db regression. Reviewed-by: Eric Anholt <[email protected]>
* v3d: Fix predication with atomic image operationsJose Maria Casanova Crespo2019-11-201-0/+12
| | | | | | | | | | | | | Fixes dEQP test: dEQP-GLES31.functional.synchronization.inter_call.with_memory_barrier.image_atomic_multiple_interleaved_write_read Fixes piglit test: spec/glsl-es-3.10/execution/cs-image-atomic-if-else.shader_test Fixes: 6281f26f064ada ("v3d: Add support for shader_image_load_store.") Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* util: Move gallium's PIPE_FORMAT utils to /util/format/Eric Anholt2019-11-142-2/+2
| | | | | | | | | | | | | | | To make PIPE_FORMATs usable from non-gallium parts of Mesa, I want to move their helpers out of gallium. Since u_format used util_copy_rect(), I moved that in there, too. I've put it in a separate directory in util/ because it's a big chunk of related code, and it's not clear to me whether we might want it as a separate library from libmesa_util at some point. Closes: #1905 Acked-by: Marek Olšák <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]> Reviewed-by: Alyssa Rosenzweig <[email protected]>
* v3d: rename vertex shader key (num)_fs_inputs fieldsIago Toral Quiroga2019-10-314-10/+11
| | | | | | | | | | | | Until now this made sense because we always paired vertex shaders with fragment shaders, but as soon as we implement geometry and tessellation shaders that will no longer be the case, so rename this to (num_)used_outputs. v2: Use 'used_outputs' instead of ns_outputs, which is more explicit (Eric). Reviewed-by: Alejandro Piñeiro <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* util: rename list_empty() to list_is_empty()Timothy Arceri2019-10-283-4/+4
| | | | | | | This makes it clear that it's a boolean test and not an action (eg. "empty the list"). Reviewed-by: Eric Engestrom <[email protected]>
* v3d: fix empty-body instructionEric Engestrom2019-10-271-1/+1
| | | | | | | Fixes: 8d43e2b2ded0fe3c82d4 ("meson: add -Werror=empty-body to disallow `if(x);`") Signed-off-by: Eric Engestrom <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* Revert "v3d: do not report alpha-test as supported"Erik Faye-Lund2019-10-232-0/+11
| | | | | | | This reverts commit 9d0523b569bb7208c6e74cafc0f3945415d94336. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Jose Maria Casanova <[email protected]>
* nir/lower_idiv: add new llvm-based pathRhys Perry2019-10-211-1/+1
| | | | | | | | | | | | | | | | | v2: make variable names snake_case v2: minor cleanups in emit_udiv() v2: fix Panfrost build failure v3: use an enum instead of a boolean flag in nir_lower_idiv()'s signature v4: remove nir_op_urcp v5: drop nv50 path v5: rebase v6: add back nv50 path v6: add comment for nir_lower_idiv_path enum v7: rename _nv50/_llvm to _fast/_precise v8: fix etnaviv build failure Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
* broadcom: document known hardware issues for L2T flush commandIago Toral Quiroga2019-10-181-0/+35
| | | | | Suggested-by: Eric Anholt <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* v3d: add new flag dirty TMU cache at v3d_compilerIago Toral Quiroga2019-10-185-0/+12
| | | | | | | | | | | | | | That we set for any TMU write on spills and general tmu. It is then used as part of v3d_emit_gl_shader_state later. v2: add a new flag instead at v3d_compiler instead of dirty the flag at v3dx if there is any spill (change suggested by Eric, added by Alejandro) v3: set this for anything that is not a load and do it also in v3d40_vir_emit_image_load_store (Eric) Reviewed-by: Eric Anholt <[email protected]>
* v3d: do not report alpha-test as supportedErik Faye-Lund2019-10-172-11/+0
| | | | | | | This triggers lowering in the state-tracker, which makes things a bit simpler. Reviewed-by: Marek Olšák <[email protected]>
* nir: support feeding state to nir_lower_clip_[vg]sErik Faye-Lund2019-10-171-1/+1
| | | | Reviewed-by: Marek Olšák <[email protected]>
* nir: support lowering clipdist to arraysErik Faye-Lund2019-10-171-2/+3
| | | | | | | | This allows us to make sure clipdist is emitted as a scalar array rather than two vec4s. This matches SPIR-V semantics, and will be useful for Zink. Reviewed-by: Marek Olšák <[email protected]>
* nir: allow passing alpha-ref state to lowering-codeErik Faye-Lund2019-10-171-1/+1
| | | | Reviewed-by: Marek Olšák <[email protected]>
* nir: add nir_shader_compiler_options::lower_to_scalarMarek Olšák2019-10-101-0/+1
| | | | | | | | This will replace PIPE_SHADER_CAP_SCALAR_ISA. Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Christian Gmeiner <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* v3d: Enable the late algebraic optimizations to get real subs.Eric Anholt2019-09-301-0/+16
| | | | | | | | | | | | | | | | | This worked better than my original v3d-local pass for just subs, and is a huge win over not producing subs. total instructions in shared programs: 6408469 -> 6167932 (-3.75%) total threads in shared programs: 153784 -> 154104 (0.21%) total uniforms in shared programs: 2157078 -> 1905823 (-11.65%) total max-temps in shared programs: 904546 -> 895796 (-0.97%) total spills in shared programs: 4959 -> 4993 (0.69%) total fills in shared programs: 6558 -> 6670 (1.71%) total sfu-stalls in shared programs: 25845 -> 25175 (-2.59%) total inst-and-stalls in shared programs: 6434314 -> 6193107 (-3.75%) Reviewed-by: Daniel Schürmann <[email protected]> Reviewed-by: Connor Abbott <[email protected]>
* broadcom/genxml: Stop manually scrubbing 'α' -> "alpha"Kenneth Graunke2019-09-231-1/+0
| | | | | | | 'α' has never appeared in any genxml files, so there's no need to replace it with the word "alpha". Reviewed-by: Eric Anholt <[email protected]>
* nir: allow specifying filter callback in lower_alu_to_scalarVasily Khoruzhick2019-09-061-1/+1
| | | | | | | | | | | | | Set of opcodes doesn't have enough flexibility in certain cases. E.g. Utgard PP has vector conditional select operation, but condition is always scalar. Lowering all the vector selects to scalar increases instruction number, so we need a way to filter only those ops that can't be handled in hardware. Reviewed-by: Qiang Yu <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Vasily Khoruzhick <[email protected]>
* v3d: writes to magic registers aren't RF writes after THRENDJose Maria Casanova Crespo2019-09-051-1/+3
| | | | | | | | | | | | | | Shaders must not attempt to write to the register files in the last three instructions, but that doesn't include the magic registers: nop ; nop ; thrsw; ldtmu.- *** ERROR *** nop ; nop nop ; nop v2: Simplify validation rules. (Eric Anholt) v3: Adjust validation even more. (Eric Anholt) Reviewed-by: Eric Anholt <[email protected]>
* nir: Fix num_ssbos when lowering atomic countersConnor Abbott2019-09-031-2/+1
| | | | | | | | | | | | Otherwise it's impossible to know the maximum SSBO index for both internal TGSI shaders from TTN (which don't have any notion of atomic counters and no offset) as well as shaders from GLSL. I fixed everything I could find while grepping for num_ssbos and num_abos, which hopefully is everything (iris was the only user I could find that uses it in a meaningful way). Reviewed-by: Marek Olšák <[email protected]>