summaryrefslogtreecommitdiffstats
path: root/src/broadcom
Commit message (Collapse)AuthorAgeFilesLines
* meson: Build with Python 3Mathieu Bridon2018-08-101-2/+2
| | | | | | | | | | | | Now that all the build scripts are compatible with both Python 2 and 3, we can flip the switch and tell Meson to use the latter. Since Meson already depends on Python 3 anyway, this means we don't need two different Python stacks to build Mesa. Signed-off-by: Mathieu Bridon <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]>
* v3d: Emit the VCM_CACHE_SIZE packet.Eric Anholt2018-08-064-4/+36
| | | | | | | This is needed to ensure that we don't get blocked waiting for VPM space with bin/render overlapping. Cc: "18.2" <[email protected]>
* v3d: Avoid spilling that breaks the r5 usage after a ldvary.Eric Anholt2018-08-061-0/+9
| | | | | | Fixes bad rendering when forcing 2 spills in glxgears. Cc: "18.2" <[email protected]>
* v3d: Make sure that QPU instruction-has-a-dest matches VIR.Eric Anholt2018-08-062-1/+11
| | | | | | | | | Found when debugging register spilling -- we would try to spill the dest of a STVPMV, inserting spill code after entering the last segment. In fact, we were likely to to choose to do this, given that the STVPMV "dest" temp was never read from, making it cheap to spill. Cc: "18.2" <[email protected]>
* v3d: Wait for TMU writes to complete before continuing after a spill.Eric Anholt2018-08-061-1/+6
| | | | | | | | The simulator complained that we had write responses outstanding at shader end. It seems that a TMU read does not guarantee that previous TMU writes by the thread have completed, which surprised me. Cc: "18.2" <[email protected]>
* v3d: Make sure we don't emit a thrsw before the last one finished.Eric Anholt2018-08-061-2/+13
| | | | | | | Found while forcing some spilling, which creates a lot of short tmua->thrsw->ldtmu sequences. Cc: "18.2" <[email protected]>
* v3d: Add some debug code for forcing register spilling.Eric Anholt2018-08-061-0/+14
| | | | | | This is useful for periodically testing out register spilling to see how it goes on simple shaders, rather than only failing on insanely complicated ones.
* v3d: Actually put the "%s" in the snprintf.Eric Anholt2018-08-011-1/+1
| | | | | | | | I missed an important part when porting the change over, fixing my compiler warning but breaking -Werror=format-security. Fixes: e6ff5ac4468e ("v3d: use snprintf(..., "%s", ...) instead of strncpy") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107443
* v3d: use snprintf(..., "%s", ...) instead of strncpyEric Anholt2018-07-311-1/+1
| | | | | Fixes a compiler warning about terminator NUL, based on f836d799f906 ("intel/decoder: use snprintf(..., "%s", ...) instead of strncpy")
* v3d: Add support for the TMUWT instruction.Eric Anholt2018-07-315-3/+22
| | | | | | This instruction is used to ensure that TMU stores have been processed before moving on. In particular, you need any TMU ops to be done by the time the shader ends.
* v3d: Dump the contents off all the buffers in CLIF mode.Eric Anholt2018-07-302-25/+207
| | | | | | A V3D_DEBUG=clif file from a non-texturing .shader_test can now be successfully run through the CLIF runner in the simulator. Now I need to build an open source CLIF runner against the v3d DRM module.
* v3d: Split walking the CLs to generate relocs from walking CLs to dump.Eric Anholt2018-07-303-37/+49
| | | | | | We need to dump each buffer's contents in order for a CLIF file, so we need to collect all of the relocs into a buffer (such as the indirect CL full of both uniforms and GL shader states) before we start dumping.
* v3d: Include commands to run the BCL and RCL in CLIF dumps.Eric Anholt2018-07-303-6/+46
|
* v3d: Use a short, underscored name for packets in CLIF/CL dumping.Eric Anholt2018-07-303-45/+72
| | | | | | | These will match the names that the CLIF parser expects to see. I may in the future decide to change more of the other names so that I match the names the HW/closed SW team uses for their packets, rather than the names in the spec (which only they and I can read anyway).
* v3d: Rename "configuration" and "config" in the XML to "cfg"Eric Anholt2018-07-301-21/+21
| | | | | | This matches what CLIF parsing expects, and makes TILE_BINNING_MODE_CONFIGURATION_COMMON_CONFIGURATION into a much more legible TILE_BINNING_MODE_CFG_COMMON.
* v3d: s/colour/color in the XML.Eric Anholt2018-07-301-19/+19
| | | | | | The CLIF format expects american english spelling, and the rest of Mesa is too. I was previously adhering to the spec's spelling, which is counterproductive.
* v3d: Rename primitives to prims in the XML to match CLIF names.Eric Anholt2018-07-301-7/+7
| | | | This makes us match up with the V3D HW team's names a bit more.
* v3d: Print CLIF fixed-point values as just their decimal value.Eric Anholt2018-07-301-6/+16
| | | | The parser doesn't handle float input, so we have to dump the raw value.
* v3d: When not doing terminal pretty-printing, comment struct field names.Eric Anholt2018-07-301-1/+7
| | | | | The struct field names aren't part of the CLIF ABI, just the order of fields within the struct. The comments are there for human readability.
* v3d: Add a separate flag for CLIF ABI output versus human-readable CLs.Eric Anholt2018-07-305-2/+11
| | | | | | A few of the upcoming changes would make the V3D_DEBUG=cl output less readable, so let's make proper CLIF file production be under a separate V3D_DEBUG=clif flag.
* v3d: Add pack header support for f187 values.Eric Anholt2018-07-305-7/+29
| | | | | | V3D only has one of these (the top 16 bits of a float32) left in its CLs, but VC4 had many more. This gets us proper pretty-printing of the values instead of a large uint.
* vc4: Fix meson build when enabled without v3d.Eric Anholt2018-07-293-22/+27
| | | | | Reported-by: Rob Clark <[email protected]> Fixes: e92959c4e03c ("v3d: Pass the whole clif_dump structure to v3d_print_group().")
* v3d: Skip printing sub-id or pad fields in CLIF dumping.Eric Anholt2018-07-271-0/+8
| | | | | The parser doesn't expect them, so our fields would end up mismatched. They're not really useful in console output, either.
* v3d: Emit commands to switch CLIF parser to CL/shader/attr input mode.Eric Anholt2018-07-272-2/+5
| | | | | | By default after saying you are emitting a buffer, it'll expect a buffer size. Once you set a format, it'll keep parsing that format until you announce something else.
* v3d: Dump fields in CLIF output in increasing offset order.Eric Anholt2018-07-271-0/+14
| | | | | | Previously, we emitted in XML order, which I happen to type in the decreasing offset order of the specifications. However, the CLIF parser wants increasing offsets.
* v3d: Print addresses in CLIFs as references to buffers.Eric Anholt2018-07-274-9/+42
| | | | | | | With CLIFs, the parser will choose an address for the buffer being created, so we need to use effectively relocations to buffers instead of the addresses that the driver uses. This is also a whole lot more intelligible for console output than raw addresses!
* v3d: Stop doing pretty-printed colorful booleans in CLIF output.Eric Anholt2018-07-274-22/+14
| | | | | The parser wants to see a 1 or 0. We can put "true" and "false" in a comment to clarify that it's a boolean and the parser will skip it.
* v3d: Move clif dumping to a separate step from noting where the CLs are.Eric Anholt2018-07-272-3/+17
| | | | Now all the printing happens from the same worklist processing.
* v3d: Move clif dump BO lookup into the clif dumper.Eric Anholt2018-07-273-15/+52
| | | | | The clif dumper is going to need information about all of our BOs if we're going to dump them for replay purposes.
* v3d: Pass the whole clif_dump structure to v3d_print_group().Eric Anholt2018-07-274-10/+12
| | | | | | To generate CLIF files that the v3dv3 simulator can parse, we're going to need to decode addresses, and for that we'll need the vaddr lookup function from the clif structure from within v3d_decoder.
* v3d: Drop the VG support from the XML.Eric Anholt2018-07-271-13/+2
| | | | | | This reflects a change on the HW/closed SW side to drop this unused HW. With it dropped on their side, the CLIF parser no longer expects to find VG fields.
* v3d: Use /* */ instead of () for enum names in CLIF output.Eric Anholt2018-07-271-1/+1
| | | | This lets the comments be ignored by the CLIF parser.
* v3d: CLIF-dump the "Vec size" field as 0 == maximum value.Eric Anholt2018-07-271-0/+2
| | | | | That's what a user should want to see, and what the CLIF parser wants. This should maybe be generalized.
* nir: Add flipping of gl_PointCoord.y in nir_lower_wpos_ytransform.Eric Anholt2018-07-261-0/+1
| | | | | | | This is controlled by a new nir_shader_compiler_options flag, and fixes dEQP-GLES3.functional.shaders.builtin_variable.pointcoord on V3D. Reviewed-by: Kenneth Graunke <[email protected]>
* python: Use range() instead of xrange()Mathieu Bridon2018-07-241-1/+1
| | | | | | | | | | | | | | | | Python 2 has a range() function which returns a list, and an xrange() one which returns an iterator. Python 3 lost the function returning a list, and renamed the function returning an iterator as range(). As a result, using range() makes the scripts compatible with both Python versions 2 and 3. Signed-off-by: Mathieu Bridon <[email protected]> Reviewed-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Reviewed-by: Ian Romanick <[email protected]>
* v3d: Implement a small immediates optimization, based on VC4's.Eric Anholt2018-07-238-19/+143
| | | | | | | | | We can do one per instruction, and we have to be careful not to overwrite raddr_b, but this greatly reduces the pressure on uniform loads (particularly around ldvpm/stvpm instructions). total instructions in shared programs: 90768 -> 88220 (-2.81%) instructions in affected programs: 82711 -> 80163 (-3.08%)
* v3d: Return an invalid src number if asked for a missing implicit uniform.Eric Anholt2018-07-232-3/+3
| | | | | | Sometimes when iterating over sources, we might want to check if it's the implicit one. We wouldn't want to match on a non-implicit src using this function.
* v3d: Skip emitting texture config parameter 2 if it's just the defaults.Eric Anholt2018-07-231-1/+5
| | | | | | shader-db: total instructions in shared programs: 91275 -> 90768 (-0.56%) instructions in affected programs: 20702 -> 20195 (-2.45%)
* v3d: Update an XXX comment for a path we handled in HW on V3D 4.x.Eric Anholt2018-07-231-1/+1
|
* v3d: Switch to using the new SFU instructions on V3D 4.x.Eric Anholt2018-07-238-24/+118
| | | | | | | | | | | | | | | | These instructions let us write directly to the phys regfile, instead of just R4. That lets us avoid moving out of R4 to avoid conflicting with other SFU results, and to avoid conflicting with thread switches. There is still an extra instruction of latency, which is not represented in the scheduler at the moment. If you use the result before it's ready, the QPU will just stall, unlike the magic R4 mode where you'd read the previous value. That means that the following shader-db results aren't quite representative (since we now cause some stalls instead of emitting nops), but they're impressive enough that I'm happy with the change. total instructions in shared programs: 95669 -> 91275 (-4.59%) instructions in affected programs: 82590 -> 78196 (-5.32%)
* v3d: Add QPU pack/unpack for the new SFU instructions.Eric Anholt2018-07-234-0/+32
| | | | | These instructions allow writing the result to any register, instead of a special writeback to r4.
* v3d: Fix the name of the "flpop" operation.Eric Anholt2018-07-236-6/+7
| | | | | Noticed while trying to sort a new op into the appropriate place to match the documentation.
* v3d: Print the instruction we're testing in the QPU disasm/pack round-trip.Eric Anholt2018-07-231-2/+3
| | | | | If we fail initial disassembly, it's good to know what instruction it was that failed.
* v3d: Drop unused vir_SAT() operation.Eric Anholt2018-07-231-8/+0
| | | | We lower saturates in NIR.
* v3d: Rotate through registers to improve post-RA scheduling options.Eric Anholt2018-07-231-0/+45
| | | | | | | | | | | Similarly to VC4's implementation, by not picking r0 immediately upon freeing it, we give the scheduler more of a chance to fit later writes in earlier. I'm not clear on whether there's any real cost to picking phys over accumulators, so keep that behavior for now. shader-db: total instructions in shared programs: 96831 -> 95669 (-1.20%) instructions in affected programs: 77254 -> 76092 (-1.50%)
* v3d: Allow reading from physical regs written in the previous instruction.Eric Anholt2018-07-231-24/+0
| | | | | | | | | This restriction existed in V3D 2.x, but lifting it was a major change in 3.x. shader-db results: total instructions in shared programs: 98117 -> 96831 (-1.31%) instructions in affected programs: 48520 -> 47234 (-2.65%)
* v3d: Disable shader-db cycle estimates until we sort out TMU estimates.Eric Anholt2018-07-161-1/+4
| | | | | I keep having to ignore these shader-db changes since I don't trust them, so just disable the reports entirely.
* v3d: Emit the lowered uniform just before its first use in a block.Eric Anholt2018-07-161-20/+18
| | | | | | | | total instructions in shared programs: 98578 -> 98119 (-0.47%) instructions in affected programs: 27571 -> 27112 (-1.66%) and it also eliminates most spills/fills on the CTS's randomized uniform usage testcases.
* v3d: Add an assert that we don't provide an invalid texture return words.Eric Anholt2018-07-161-0/+8
| | | | The docs had an update noting this restriction, so reflect it in the code.
* v3d: Apply GFXH-1625 restriction on TMUWT in the end of the shader.Eric Anholt2018-07-161-0/+4
| | | | | This doesn't affect us yet since we're not doing TMUWTs, but I think we will for GLES 3.1.
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-02 18:57:32 +0000