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* nir/opt_peephole_select: Don't peephole_select expensive math instructionsIan Romanick2018-12-171-1/+1
* nir/opt_peephole_select: Don't try to remove flow control around indirect loadsIan Romanick2018-12-171-1/+1
* v3d: Fix the argument type for vir_BRANCH().Eric Anholt2018-12-171-1/+1
* nir: Add a bool to int32 lowering passJason Ekstrand2018-12-161-0/+2
* nir: Rename Boolean-related opcodes to include 32 in the nameJason Ekstrand2018-12-161-22/+22
* v3d: Use the original bit size when scalarizing uniform loads.Eric Anholt2018-12-161-1/+2
* v3d: Drop in a bunch of notes about performance improvement opportunities.Eric Anholt2018-12-143-1/+61
* v3d: Do uniform pretty-printing in the QPU dump.Eric Anholt2018-12-141-1/+47
* v3d: Move uniform pretty-printing to its own helper function.Eric Anholt2018-12-142-71/+77
* v3d: Avoid assertion failures when removing end-of-shader instructions.Eric Anholt2018-12-141-0/+6
* v3d: Make sure that a thrsw doesn't split a multop from its umul24.Eric Anholt2018-12-141-0/+1
* v3d: Fix a leak of the disassembled instruction string during debug dumps.Eric Anholt2018-12-071-0/+1
* v3d: Add VIR dumping of TMU config p0/p1.Eric Anholt2018-12-072-0/+27
* v3d: Simplify VIR uniform dumping using a temporary.Eric Anholt2018-12-071-19/+10
* v3d: Garbage collect unused uniforms code.Eric Anholt2018-12-071-2/+0
* v3d: Return the right gl_SampleMaskIn[] value.Eric Anholt2018-12-072-3/+1
* v3d: Fix a comment typoEric Anholt2018-12-071-1/+1
* v3d: Convert to using nir_src_as_uint() from const_value derefs.Eric Anholt2018-12-071-14/+10
* v3d: Use combined input/output segments.Eric Anholt2018-12-073-1/+34
* nir: Make boolean conversions sized just like the othersJason Ekstrand2018-12-051-4/+4
* nir: Make nir_lower_clip_vs optionally work with variables.Kenneth Graunke2018-11-191-1/+2
* v3d: Don't try to set PF flags on a LDTMU operationEric Anholt2018-11-151-0/+6
* v3d: Update the TLB config for depth writes on V3D 4.2.Eric Anholt2018-11-011-8/+22
* v3d: Use nir_remove_unused_io_vars to handle binner shader output DCEEric Anholt2018-10-302-45/+13
* v3d: Only add output slot tracking for the current varying slot.Eric Anholt2018-10-301-1/+1
* v3d: Use nir_lower_io_to_scalar_early to DCE unused VS input components.Eric Anholt2018-10-301-0/+16
* v3d: Don't rely on sorting input vars for VPM read setup.Eric Anholt2018-10-301-28/+20
* v3d: Split out NIR input setup between FS and VPM.Eric Anholt2018-10-301-47/+80
* util: use C99 declaration in the for-loop hash_table_foreach() macroEric Engestrom2018-10-252-3/+0
* v3d: Add support for hardware pack/unpack of half floats.Eric Anholt2018-10-151-0/+16
* v3d: Fix setup of the VCM cache size.Eric Anholt2018-09-071-1/+2
* v3d: Emit the VCM_CACHE_SIZE packet.Eric Anholt2018-08-062-1/+22
* v3d: Avoid spilling that breaks the r5 usage after a ldvary.Eric Anholt2018-08-061-0/+9
* v3d: Make sure that QPU instruction-has-a-dest matches VIR.Eric Anholt2018-08-062-1/+11
* v3d: Wait for TMU writes to complete before continuing after a spill.Eric Anholt2018-08-061-1/+6
* v3d: Make sure we don't emit a thrsw before the last one finished.Eric Anholt2018-08-061-2/+13
* v3d: Add some debug code for forcing register spilling.Eric Anholt2018-08-061-0/+14
* v3d: Add support for the TMUWT instruction.Eric Anholt2018-07-313-3/+13
* vc4: Fix meson build when enabled without v3d.Eric Anholt2018-07-291-0/+2
* nir: Add flipping of gl_PointCoord.y in nir_lower_wpos_ytransform.Eric Anholt2018-07-261-0/+1
* v3d: Implement a small immediates optimization, based on VC4's.Eric Anholt2018-07-237-19/+142
* v3d: Return an invalid src number if asked for a missing implicit uniform.Eric Anholt2018-07-232-3/+3
* v3d: Skip emitting texture config parameter 2 if it's just the defaults.Eric Anholt2018-07-231-1/+5
* v3d: Update an XXX comment for a path we handled in HW on V3D 4.x.Eric Anholt2018-07-231-1/+1
* v3d: Switch to using the new SFU instructions on V3D 4.x.Eric Anholt2018-07-236-24/+87
* v3d: Fix the name of the "flpop" operation.Eric Anholt2018-07-232-2/+2
* v3d: Drop unused vir_SAT() operation.Eric Anholt2018-07-231-8/+0
* v3d: Rotate through registers to improve post-RA scheduling options.Eric Anholt2018-07-231-0/+45
* v3d: Allow reading from physical regs written in the previous instruction.Eric Anholt2018-07-231-24/+0
* v3d: Disable shader-db cycle estimates until we sort out TMU estimates.Eric Anholt2018-07-161-1/+4
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