summaryrefslogtreecommitdiffstats
path: root/src/broadcom/compiler/vir_dump.c
Commit message (Expand)AuthorAgeFilesLines
* v3d: Move constant offsets to UBO addresses into the main uniform stream.Eric Anholt2019-03-211-1/+3
* v3d: Rename v3d_tmu_config_data to v3d_unit_data.Eric Anholt2019-03-211-6/+6
* v3d: Include a count of register pressure in the RA failure dumps.Eric Anholt2019-03-061-1/+13
* v3d: Eliminate the TLB and TLBU files.Eric Anholt2019-03-051-13/+2
* v3d: Use ldunif instructions for uniforms.Eric Anholt2019-03-051-9/+0
* v3d: Switch implicit uniforms over to being any qinst->uniform != ~0.Eric Anholt2019-03-051-11/+10
* v3d: Fix dumping of shaders with alpha test.Eric Anholt2019-02-051-1/+3
* v3d: Add support for CS shared variable load/store/atomics.Eric Anholt2019-01-141-0/+1
* v3d: Add support for CS workgroup/invocation id intrinsics.Eric Anholt2019-01-141-0/+4
* v3d: Add support for shader_image_load_store.Eric Anholt2019-01-141-0/+19
* v3d: Add SSBO/atomic counters support.Eric Anholt2019-01-141-0/+8
* v3d: Move uniform pretty-printing to its own helper function.Eric Anholt2018-12-141-71/+76
* v3d: Add VIR dumping of TMU config p0/p1.Eric Anholt2018-12-071-0/+12
* v3d: Simplify VIR uniform dumping using a temporary.Eric Anholt2018-12-071-19/+10
* v3d: Implement a small immediates optimization, based on VC4's.Eric Anholt2018-07-231-9/+18
* broadcom/vc5: Fix extraneous register index in QIR dumping of TLBU writes.Eric Anholt2018-03-261-0/+1
* broadcom/vc5: Don't annotate dumps with stale live intervals.Eric Anholt2018-03-191-2/+2
* broadcom/vc5: Add support for loading varyings in V3D 4.1.Eric Anholt2018-01-121-1/+0
* broadcom/vc5: Add support for V3Dv4 signal bits.Eric Anholt2018-01-121-2/+43
* broadcom: Add VC5 NIR compiler.Eric Anholt2017-10-101-0/+339
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-21 13:18:12 +0000