mesa.git - Unnamed repository; edit this file 'description' to name the repository.

	Commit message (Expand)	Author	Age	Files	Lines
*	v3d: Use combined input/output segments.	Eric Anholt	2018-12-07	1	-1/+21
*	v3d: Make sure we don't emit a thrsw before the last one finished.	Eric Anholt	2018-08-06	1	-2/+13
*	v3d: Add support for the TMUWT instruction.	Eric Anholt	2018-07-31	1	-3/+6
*	v3d: Implement a small immediates optimization, based on VC4's.	Eric Anholt	2018-07-23	1	-1/+2
*	v3d: Switch to using the new SFU instructions on V3D 4.x.	Eric Anholt	2018-07-23	1	-5/+7
*	v3d: Fix the name of the "flpop" operation.	Eric Anholt	2018-07-23	1	-1/+1
*	v3d: Allow reading from physical regs written in the previous instruction.	Eric Anholt	2018-07-23	1	-24/+0
*	v3d: Apply GFXH-1625 restriction on TMUWT in the end of the shader.	Eric Anholt	2018-07-16	1	-0/+4
*	broadcom/vc5: Extract v3d_qpu_writes_tmu() helper.	Eric Anholt	2018-03-19	1	-6/+1
*	broadcom/vc5: Try to merge more than 2 QPU instructions together.	Eric Anholt	2018-02-05	1	-5/+13
*	broadcom/vc5: Add compiler support for V3D 4.x texturing.	Eric Anholt	2018-01-12	1	-0/+15
*	broadcom/vc5: Use THRSW to enable multi-threaded shaders.	Eric Anholt	2018-01-12	1	-40/+56
*	broadcom/vc5: Properly schedule the thread-end THRSW.	Eric Anholt	2018-01-12	1	-33/+137
*	broadcom/vc5: Implement GFXH-1684 workaround.	Eric Anholt	2018-01-12	1	-0/+4
*	broadcom/vc5: Use the new LDVPM/STVPM opcodes on V3D 4.1.	Eric Anholt	2018-01-12	1	-3/+3
*	broadcom/vc5: Add support for V3Dv4 signal bits.	Eric Anholt	2018-01-12	1	-9/+32
*	broadcom/vc5: Fix scheduling for a non-SFU R4 write after a dead R4 write.	Eric Anholt	2017-11-07	1	-3/+5
*	broadcom/vc5: Don't pair VPMSETUP with other peripheral access.	Eric Anholt	2017-10-12	1	-0/+3
*	broadcom: Add VC5 NIR compiler.	Eric Anholt	2017-10-10	1	-0/+1362