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* broadcom/vc5: Enable CLIF dumping of V3D 4.2.Eric Anholt2018-01-271-0/+4
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* broadcom/vc5: Add support for V3D 4.1 CLIF dumping.Eric Anholt2018-01-121-0/+4
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* broadcom/vc5: Move the body of CLIF dumping to a per-version file.Eric Anholt2018-01-121-0/+4
| | | | | I want the library's entrypoints to still be unversioned, but the actual packet dumping needs to be per-version.
* broadcom: Add VC5 NIR compiler.Eric Anholt2017-10-101-0/+1
| | | | | | | | | | | This is a pretty straightforward fork of VC4's NIR compiler to VC5. The condition codes, registers, and I/O have all changed, making the backend hard to share, though their heritage is still recognizable. v2: Move to src/broadcom/compiler to match intel's layout, rename more "vc5" to "v3d", rename QIR to VIR ("V3D IR") to avoid symbol conflicts with vc4, use new v3d_debug header, add compiler init/free functions, do texture swizzling in NIR to allow optimization.
* broadcom: Add V3D 3.3 QPU instruction pack, unpack, and disasm.Eric Anholt2017-10-101-0/+19
Unlike VC4, I've defined an unpacked instruction format with pack/unpack functions to convert to 64-bit encoded instructions. This will let us incrementally put together our instructions and validate them in a more natural way than the QPU_GET_FIELD/QPU_SET_FIELD used to. The pack/unpack unfortuantely are written by hand. While I could define genxml for parts of it, there are many special cases (like operand order of commutative binops choosing which binop is being performed!) and it probably wouldn't come out much cleaner. The disasm unit test ensures that we have the same assembly format as Broadcom's internal tools, other than whitespace changes. v2: Fix automake variable redefinition complaints, add test to .gitignore