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* ac/nir: fix atomic compare-and-swapNicolai Hähnle2018-04-201-0/+1
| | | | | | | | | The LLVM instruction returns { i32, i1 }, where the i1 indicates success. We're only interested in the first part, which is the loaded value. Fixes dEQP-GLES31.functional.compute.shared_var.atomic.compswap.* Reviewed-by: Timothy Arceri <[email protected]>
* radv: Add Vega M support.Bas Nieuwenhuizen2018-04-194-2/+11
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Add bound checking workaround for dynamic buffers.Bas Nieuwenhuizen2018-04-193-1/+5
| | | | | | | I have seen a few applications and games do the dynamic buffer bounds incorrectly, this make it easier to work around, e.g. for debugging. Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: enable DCC for MSAA 2x textures on VI under an optionSamuel Pitoiset2018-04-194-1/+13
| | | | | | | | | | | | | | | | This can be enabled with RADV_PERFTEST=dccmsaa. DCC for MSAA textures is actually not as easy to implement. It looks like there is some corner cases. I will improve support incrementally. Vega support, as well as Polaris improvements, will be added later. No CTS changes on Polaris using RADV_DEBUG=zerovram and RADV_PERFTEST=dccmsaa. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: decompress DCC for multisampled source images before resolvingSamuel Pitoiset2018-04-194-4/+18
| | | | | | | | | Multisampled source images (ie. color attachments) can be now DCC compressed, so the driver needs to perform a DCC decompression pass before resolving Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add a workaround for fast clears with DCC and MSAA texturesSamuel Pitoiset2018-04-191-0/+9
| | | | | | | | This should be fixed at some point in order to improve performance. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: allocate CMASK for DCC fast clear with MSAASamuel Pitoiset2018-04-191-0/+7
| | | | | | | | CMASK is required because it should be cleared to 0xCCCCCCCC for MSAA textures. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: implement fast color clear for DCC with MSAASamuel Pitoiset2018-04-191-1/+16
| | | | | | | | When DCC is enabled with MSAA textures, CMASK should be cleared to 0xCCCCCCCC. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: make sure to sync after resolving using the compute pathSamuel Pitoiset2018-04-191-0/+3
| | | | | | | | | | | | | | | This fixes some random CTS failures: dEQP-VK.renderpass.multisample.*. Performing a fast-clear eliminate is still useless, but it seems that we need to sync. Found while running CTS with RADV_DEBUG=zerovram. Fixes: 56a171a499c ("radv: don't fast-clear eliminate after resolving a subpass with compute") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: dump the SHA1 of SPIRV in the hang reportSamuel Pitoiset2018-04-191-1/+8
| | | | | | | | Might be useful for debugging purposes, especially when we want to replace a shader on the fly. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: Enable VK_EXT_descriptor_indexing.Bas Nieuwenhuizen2018-04-183-0/+63
| | | | | | | This adds everything except non-uniform indexing, which needs a bit more work and testing. Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Support allocating variable size descriptor sets.Bas Nieuwenhuizen2018-04-181-4/+17
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Add support for variable descriptor set layouts.Bas Nieuwenhuizen2018-04-182-1/+30
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Fix GetDescriptorSetLayoutSupport.Bas Nieuwenhuizen2018-04-181-3/+0
| | | | | | | The continue means we do alignment differently than during creation, making the buffer smaller than expected. Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Use sorted bindings for set layout creation.Bas Nieuwenhuizen2018-04-181-2/+41
| | | | | | | | Previously we did not care about havin the set storage in order, but for variable descriptor count we want the highest binding at the end of the storage. Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Don't store buffer references in the descriptor set.Bas Nieuwenhuizen2018-04-185-82/+13
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Keep a global BO list for VkMemory.Bas Nieuwenhuizen2018-04-184-39/+146
| | | | | | | | | | | | | | With update after bind we can't attach bo's to the command buffer from the descriptor set anymore, so we have to have a global BO list. I am somewhat surprised this works really well even though we have implicit synchronization in the WSI based on the bo list associations and with the new behavior every command buffer is associated with every swapchain image. But I could not find slowdowns in games because of it. Reviewed-by: Samuel Pitoiset <[email protected]>
* radeonsi: add support for VegaMMarek Olšák2018-04-183-0/+6
| | | | Acked-by: Nicolai Hähnle <[email protected]>
* amd/addrlib: add support for VegaMMarek Olšák2018-04-184-0/+41
| | | | Acked-by: Nicolai Hähnle <[email protected]>
* radv: fix scissor computation when using half-pixel viewport offsetSamuel Pitoiset2018-04-171-4/+4
| | | | | | | | | | | 'scale[i]' can be non-integer. Original patch by Philip Rebohle. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106074 Fixes: 0f3de89a56a ("radv: Use the guard band.") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Niuwenhuizen <[email protected]>
* anv,radv: Drop XML workarounds for VK_ANDROID_native_bufferJason Ekstrand2018-04-161-6/+1
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: clean up radv_decompress_resolve_subpass_src()Samuel Pitoiset2018-04-161-10/+7
| | | | | | | To handle the source color image transitions in the same place. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Niuwenhuizen <[email protected]>
* radv: don't fast-clear eliminate after resolving a subpass with computeSamuel Pitoiset2018-04-161-14/+0
| | | | | | | | | That looks useless, and I think radv_handle_image_transition() will do a fast-clear eliminate because it's called after the resolve. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Niuwenhuizen <[email protected]>
* radv: handle CMASK/FMASK transitions only if DCC is disabledSamuel Pitoiset2018-04-161-3/+1
| | | | | | | | DCC implies a fast-clear eliminate, so I think this sounds reasonable. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Niuwenhuizen <[email protected]>
* radv: merge radv_handle_{dcc,cmask}_image_transition() functionsSamuel Pitoiset2018-04-161-41/+17
| | | | | | | Into radv_handle_color_image_transition(). Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Niuwenhuizen <[email protected]>
* radv: add radv_init_color_image_metadata() helperSamuel Pitoiset2018-04-161-10/+41
| | | | | | | | In order to separate initialization from decompression. In the future, that will allow us to init DCC/FMASK/CMASK in one shot. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Niuwenhuizen <[email protected]>
* radv: make radv_initialise_cmask() staticSamuel Pitoiset2018-04-162-4/+2
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Niuwenhuizen <[email protected]>
* radv: clean up radv_handle_image_transition() a bitSamuel Pitoiset2018-04-161-11/+20
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Niuwenhuizen <[email protected]>
* radv: add radv_handle_color_image_transition() helperSamuel Pitoiset2018-04-161-9/+25
| | | | | | | To handle CMASK, FMASK and DCC transitions in the same place. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Niuwenhuizen <[email protected]>
* radv: handle DCC image transitions before CMASK/FMASK transitionsSamuel Pitoiset2018-04-161-5/+5
| | | | | | | | | Mostly because DCC implies a fast-clear eliminate and we should be able to skip some DCC decompressions by setting a predicate like for CMASK and FMASK. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Niuwenhuizen <[email protected]>
* radv: disable prediction only if it has been enabledSamuel Pitoiset2018-04-161-1/+1
| | | | | | | | | When decompressing DCC we don't enable it, so it's useless to disable it. This reduces the number of prediction packets sent to the GPU when performing color decompression passes. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Niuwenhuizen <[email protected]>
* ac/nir: Make the GFX9 buffer size fix apply to image loads/atomics too.Bas Nieuwenhuizen2018-04-161-17/+22
| | | | | | | | | No clue how I missed those ... Fixes: 4503ff760c "ac/nir: Add workaround for GFX9 buffer views." CC: <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105320 Reviewed-by: Nicolai Hähnle <[email protected]>
* radv: enable subgroup capabilitiesDaniel Schürmann2018-04-142-3/+14
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: handle subgroup intrinsicsDaniel Schürmann2018-04-141-29/+40
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: add LLVM build functions for subgroup instrinsicsDaniel Schürmann2018-04-142-1/+485
| | | | | Co-authored-by: Connor Abbott <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: make ballot and umsb capable of 64bit inputsDaniel Schürmann2018-04-141-9/+25
| | | | | Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* winsys/amdgpu: allow local BOs on APUsMarek Olšák2018-04-131-1/+2
| | | | | | | Local BOs ignore BO priorities, and we don't need those on APUs. Reviewed-by: Samuel Pitoiset <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* mesa: include mtypes.h lessMarek Olšák2018-04-125-0/+7
| | | | | | | | | | - remove mtypes.h from most header files - add main/menums.h for often used definitions - remove main/core.h v2: fix radv build Reviewed-by: Brian Paul <[email protected]>
* radv: Implement VK_EXT_vertex_attribute_divisor.Bas Nieuwenhuizen2018-04-126-11/+50
| | | | | | | Pretty straight forward, just pass the divisors through the shader key and then do a LLVM divide. Reviewed-by: Samuel Pitoiset <[email protected]>
* ac/surface: Allow S swizzle for displayable surfaces.Bas Nieuwenhuizen2018-04-121-2/+5
| | | | | | | | | | | For dcn1 && < 64 bpp displayable surfaces, addrlib only accepts S swizzles. At the same time addrlib prefers D swizzles is allowed, so we can just allow S swizzles as fallback. Fixes: b64b712558 "ac/surface/gfx9: request desired micro tile mode explicitly" Reviewed-by: Marek Olšák <[email protected]>
* radv: fix radv_layout_dcc_compressed() when image doesn't have DCCSamuel Pitoiset2018-04-121-1/+1
| | | | | | | | | | | | | | | | num_dcc_levels means that DCC is supported, but this doesn't mean that it's enabled by the driver. Instead, we should rely on radv_image_has_dcc(). This fixes some multisample regressions since 0babc8e5d66 ("radv: fix picking the method for resolve subpass") on Vega. This is because the resolve method changed from HW to FS, but those fails are totally unexpected, so there might some differences between Polaris and Vega here. Fixes: 44fcf587445 ("radv: Disable DCC for GENERAL layout and compute transfer dest.") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add radv_decompress_resolve_{subpass}_src() helpersSamuel Pitoiset2018-04-124-54/+73
| | | | | | | | This helper shares common code before resolving using either a fragment or a compute shader. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add radv_init_dcc_control_reg() helperSamuel Pitoiset2018-04-121-32/+52
| | | | | | | And add some comments. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: Enable RB+ on Raven.Bas Nieuwenhuizen2018-04-111-1/+2
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* vulkan: fix build issue on android (both anv/radv)Tapani Pälli2018-04-111-3/+3
| | | | | | | | | | Fixes linking errors against: anv_GetPhysicalDeviceImageFormatProperties2KHR radv_GetPhysicalDeviceImageFormatProperties2KHR Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radeonsi: pass -O halt_waves to umr for hang debuggingNicolai Hähnle2018-04-111-1/+1
| | | | | | | | | | | This will give us meaningful wave information in the case of a hang where shaders are still running in an infinite loop. Note that we call umr multiple times for different sections of the ddebug hang dump, and so the wave information will not necessarily match up between sections. Reviewed-by: Marek Olšák <[email protected]>
* vulkan: Drop vk_android_native_buffer.xmlJason Ekstrand2018-04-103-16/+8
| | | | | | | | All the information in vk_android_native_buffer.xml is now in vk.xml. The only exception is the extension type attribute which we can work around in the generators while we wait for the XML to be fixed. Reviewed-by: Dylan Baker <[email protected]>
* radv: Enable RB+ where possible.Bas Nieuwenhuizen2018-04-113-6/+151
| | | | | | | | | | | | | | | According to Marek, not enabling it on Stoney has a significant negative performance impact. (And I guess this might impact performance on Raven as well) The register settings are pretty much copied from radeonsi. I did not put this in the pipeline as that would make the pipeline more dependent on the format which mean we would have to have more pipelines for the meta shaders. v2: Don't clear RB+ regs if not enabled as the CLEAR_STATE packet does already. Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: fix picking the method for resolve subpassSamuel Pitoiset2018-04-101-1/+1
| | | | | | | | | | | The source and destination image parameters were swapped. No CTS changes on Polaris10, but I suspect this might fix something. Fixes: 2a04f5481df ("radv/meta: select resolve paths") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add shader BOs to the list at pipeline bind timeSamuel Pitoiset2018-04-101-3/+15
| | | | | | | | | | | | Otherwise, the shader BOs are not added to the list on SI because prefetching isn't supported. Calling radv_cs_add_buffer() in the prefetch codepath was a bad idea. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105952 Fixes: 4ad7595f35 ("radv: rename radv_emit_prefetch() to radv_emit_prefetch_L2") Signed-off-by: Samuel Pitoiset <[email protected]> Tested-by: Turo Lamminen <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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