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* ac: make use of ac_get_llvm_num_components() helperTimothy Arceri2018-02-261-5/+1
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Really use correct HTILE expanded words.James Legg2018-02-241-3/+3
| | | | | | | | | | | | | | | | | | | | When transitioning to an htile compressed depth format, Set the full depth range, so later rasterization can pass HiZ. Previously, for depth only formats, the depth range was set to 0 to 0. This caused unwanted HiZ rejections with a VK_FORMAT_D16_UNORM depth buffer (VK_FORMAT_D32_SFLOAT was not affected somehow). These values are derived from PAL [0], since I can't find the specification describing the htile values. [0] https://github.com/GPUOpen-Drivers/pal/blob/5cba4ecbda9452773f59692f5915301e7db4a183/src/core/hw/gfxip/gfx9/gfx9MaskRam.cpp#L1500 CC: Dave Airlie <[email protected]> CC: Bas Nieuwenhuizen <[email protected]> CC: [email protected] Reviewed-by: Bas Nieuwenhuizen <[email protected]> Tested-by: Grazvydas Ignotas <[email protected]> Fixes: 5158603182fe7435 "radv: Use correct HTILE expanded words."
* radv/extensions: fix c_vk_version for patch == NoneMauro Rossi2018-02-241-1/+2
| | | | | | | | | | | | | | | | | | | | Similar to cb0d1ba156 ("anv/extensions: Fix VkVersion::c_vk_version for patch == None") fixes the following building errors: out/target/product/x86_64/obj_x86/STATIC_LIBRARIES/libmesa_radv_common_intermediates/radv_entrypoints.c:1161:48: error: use of undeclared identifier 'None'; did you mean 'long'? return instance && VK_MAKE_VERSION(1, 0, None) <= core_version; ^~~~ long external/mesa/include/vulkan/vulkan.h:34:43: note: expanded from macro 'VK_MAKE_VERSION' (((major) << 22) | ((minor) << 12) | (patch)) ^ ... fatal error: too many errors emitted, stopping now [-ferror-limit=] 20 errors generated. Fixes: e72ad05c1d ("radv: Return NULL for entrypoints when not supported.") Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: Fix autotools build.Bas Nieuwenhuizen2018-02-231-1/+3
| | | | | | | Somewhere along the way the Makefile changes got lost ... Fixes: 4db78f3a6b "radv: Put supported extensions in a struct." Acked-by: Dave Airlie <[email protected]>
* radv: Return NULL for entrypoints when not supported.Bas Nieuwenhuizen2018-02-234-9/+83
| | | | | | | | | | | | | | | | This implements strict checking for the entrypoint ProcAddr functions. - InstanceProcAddr with instance = NULL, only returns the 3 allowed entrypoints. - DeviceProcAddr does not return any instance entrypoints. - InstanceProcAddr does not return non-supported or disabled instance entrypoints. - DeviceProcAddr does not return non-supported or disabled device entrypoints. - InstanceProcAddr still returns non-supported device entrypoints. Reviewed-by: Dave Airlie <[email protected]>
* radv: Reword radv_entrypoints_gen.pyBas Nieuwenhuizen2018-02-231-56/+106
| | | | | | With a big inspiration from anv as always ... Reviewed-by: Dave Airlie <[email protected]>
* radv: Track enabled extensions.Bas Nieuwenhuizen2018-02-232-36/+48
| | | | Reviewed-by: Dave Airlie <[email protected]>
* radv: Put supported extensions in a struct.Bas Nieuwenhuizen2018-02-234-63/+133
| | | | Reviewed-by: Dave Airlie <[email protected]>
* ac/nir: remove emission of nir_op_fpowSamuel Pitoiset2018-02-221-4/+0
| | | | | | | fpow is now lowered at NIR level. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: enable lowering of fpow to fexp2 and flog2Samuel Pitoiset2018-02-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | There is no fpow in hardware, so it's always lowered somewhere, but it appears that lowering at NIR level is better. Figured while comparing compute shaders between RadeonSI and RADV. Polaris10: Totals from affected shaders: SGPRS: 18936 -> 18904 (-0.17 %) VGPRS: 12240 -> 12220 (-0.16 %) Spilled SGPRs: 2809 -> 2809 (0.00 %) Code Size: 718116 -> 719848 (0.24 %) bytes Max Waves: 1409 -> 1410 (0.07 %) Vega10: Totals from affected shaders: SGPRS: 18392 -> 18392 (0.00 %) VGPRS: 12008 -> 11920 (-0.73 %) Spilled SGPRs: 3001 -> 2981 (-0.67 %) Code Size: 777444 -> 778788 (0.17 %) bytes Max Waves: 1503 -> 1504 (0.07 %) Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: set GLC=1 for load/store of coherent/volatile imagesSamuel Pitoiset2018-02-221-3/+4
| | | | | | | | | | This disables persistence accross wavefronts. F1 2017 and Wolfenstein 2 appear to use some coherent images but this patch doesn't seem to change anything. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/radeonsi: pass type to load_tess_varyings()Timothy Arceri2018-02-222-2/+14
| | | | | | We need this to be able to load 64bit varyings. Reviewed-by: Marek Olšák <[email protected]>
* amd/common:add uvd hevc enc support check in hw queryJames Zhu2018-02-212-1/+12
| | | | | | | Based on amdgpu hardware query information to check if UVD hevc enc support Signed-off-by: James Zhu <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac/nir: add glsl_is_array_image() helperSamuel Pitoiset2018-02-211-23/+18
| | | | | | | For consistency. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: set the DA field when performing atomics on 3D imagesSamuel Pitoiset2018-02-211-1/+2
| | | | | | | This doesn't fix anything known but it should definitely be set. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: don't send num_tcs_input_cp to sgprs.Dave Airlie2018-02-211-4/+1
| | | | | | | We never use it in the shaders. Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/tess: don't need to look in constant for vertices_per_patchDave Airlie2018-02-212-2/+5
| | | | | | | This just avoids passing this value via user sgprs. Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* ac/radv: cleanup some tcs output values accessDave Airlie2018-02-211-2/+8
| | | | | | | Just consolidates some code to make it easier to change. Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* ac/radv: remove total_vertices variableDave Airlie2018-02-211-4/+3
| | | | | | | This just removes an unneeded variable. Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* ac/radv: don't mark tess inner as used if we don't use it.Dave Airlie2018-02-211-8/+11
| | | | | | | | This just avoids marking it as a used output if we don't actually use it. Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* ac/nir: to integer the args to bcsel.Dave Airlie2018-02-201-1/+2
| | | | | | | | | | | | | dEQP-VK.tessellation.invariance.outer_edge_symmetry.triangles_equal_spacing_ccw was hitting an llvm assert due to one value being an int and the other a float. This just casts both values to integer and fixes the test. Fixes: dEQP-VK.tessellation.invariance.outer_edge_symmetry.triangles_equal_spacing_ccw Cc: [email protected] Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* ac/nir: move ac_declare_lds_as_pointer() outside of the switchSamuel Pitoiset2018-02-201-5/+7
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: allow to force family using RADV_FORCE_FAMILYSamuel Pitoiset2018-02-201-0/+33
| | | | | | | Useful for pipeline-db. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: compact varyings after removing unused onesSamuel Pitoiset2018-02-191-6/+3
| | | | | | | | | | | | | | | | | | | | | | | | It makes no sense to compact before, and the description of nir_compact_varyings() confirms that. Polaris10: Totals from affected shaders: SGPRS: 108528 -> 108128 (-0.37 %) VGPRS: 74548 -> 74500 (-0.06 %) Spilled SGPRs: 844 -> 814 (-3.55 %) Code Size: 3007328 -> 2992932 (-0.48 %) bytes Max Waves: 16019 -> 16009 (-0.06 %) Vega10: Totals from affected shaders: SGPRS: 106088 -> 106232 (0.14 %) VGPRS: 74652 -> 74700 (0.06 %) Spilled SGPRs: 692 -> 658 (-4.91 %) Code Size: 2967708 -> 2953028 (-0.49 %) bytes Max Waves: 18178 -> 18162 (-0.09 %) Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* radeonsi: implement 32-bit pointers in user data SGPRs (v2)Marek Olšák2018-02-172-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | User SGPRs changes: VS: 14 -> 9 TCS: 14 -> 10 TES: 10 -> 6 GS: 8 -> 4 GSCOPY: 2 -> 1 PS: 9 -> 5 Merged VS-TCS: 24 -> 16 Merged VS-GS: 18 -> 11 Merged TES-GS: 18 -> 11 SGPRS: 2170102 -> 2158430 (-0.54 %) VGPRS: 1645656 -> 1641516 (-0.25 %) Spilled SGPRs: 9078 -> 8810 (-2.95 %) Spilled VGPRs: 130 -> 114 (-12.31 %) Scratch size: 1508 -> 1492 (-1.06 %) dwords per thread Code Size: 52094872 -> 52692540 (1.15 %) bytes Max Waves: 371848 -> 372723 (0.24 %) v2: - the shader cache needs to take address32_hi into account - set amdgpu-32bit-address-high-bits Reviewed-by: Samuel Pitoiset <[email protected]> (v1)
* ac: query high bits of 32-bit address spaceMarek Olšák2018-02-172-0/+8
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* radv: Always lower indirect derefs after nir_lower_global_vars_to_local.Bas Nieuwenhuizen2018-02-153-36/+53
| | | | | | | | Otherwise new local variables can cause hangs on vega. CC: <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105098 Reviewed-by: Timothy Arceri <[email protected]>
* ac/nir: do not reserve user SGPRs for unused descriptor setsSamuel Pitoiset2018-02-151-3/+6
| | | | | | | | | | | | | In theory this might lead to corruption if we bind a descriptor set which is unused, because LLVM is smart and it can re-use unused user SGPRs. In practice, this doesn't seem to fix anything. As a side effect, this will reduce the number of emitted SH_REG packets. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/shader: fix gathering of desc_set_used_maskSamuel Pitoiset2018-02-151-1/+1
| | | | | | | This was quite wrong. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/shader: be a little smarter when scanning vertex buffersSamuel Pitoiset2018-02-151-1/+11
| | | | | | | | | | Although meta shaders don't use any vertex buffers, there is no behaviour change but I think it's better to do this. Though, this saves two user SGPRs for push constants inlining or something else. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: implement nir_intrinsic_image_samplesTimothy Arceri2018-02-151-0/+23
| | | | | | | Fixes cts test: KHR-GL45.shader_texture_image_samples_tests.image_functional_test Reviewed-by: Marek Olšák <[email protected]>
* ac/nir_to_llvm: fix image size for arrays of arraysTimothy Arceri2018-02-151-6/+4
| | | | | | | Fixes cts test: KHR-GL44.shader_image_size.advanced-changeSize Reviewed-by: Marek Olšák <[email protected]>
* ac/nir: rename nir_to_llvm_context to radv_shader_contextSamuel Pitoiset2018-02-141-74/+74
| | | | | | | There is still more to do in that area, but it's a good start. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: remove nir_to_llvm_context from ac_nir_translate()Samuel Pitoiset2018-02-142-4/+3
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: remove nir_to_llvm_context::nir linkSamuel Pitoiset2018-02-141-11/+0
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: move the outputs array to the ABISamuel Pitoiset2018-02-142-25/+26
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/shader: scan force_persampleSamuel Pitoiset2018-02-142-3/+17
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: Use the renumbered const address space for LLVM 7.Bas Nieuwenhuizen2018-02-141-1/+2
| | | | | | | The LLVM AMDGPU backend decided to renumber the constant address space .... Reviewed-by: Samuel Pitoiset <[email protected]>
* ac/nir: add nir_intrinsic_{load,store}_shared supportTimothy Arceri2018-02-131-0/+46
| | | | | Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* ac/nir_to_llvm: add support for nir_intrinsic_shared_atomic_*Timothy Arceri2018-02-131-6/+42
| | | | | Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Fix compiler warning about uninitialized 'set'Eric Anholt2018-02-121-1/+1
| | | | | | | The compiler doesn't figure out that we only get result == VK_SUCCESS if set got initialized. Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: Fix compiler warning about uninitialized dw_addr.Eric Anholt2018-02-121-1/+1
| | | | | | | | Even switching the def's condition to be the same chip revision check as the use, the compiler doesn't figure it out. Just NULL-init it. Fixes: ec53e527421d ("ac/nir: Add ES output to LDS for GFX9.") Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: remove backlink to nir_to_llvm_contextSamuel Pitoiset2018-02-121-6/+0
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: remove nir_to_llvm_context::moduleSamuel Pitoiset2018-02-121-13/+10
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: remove nir_to_llvm_context::builderSamuel Pitoiset2018-02-121-95/+92
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: drop nir_to_llvm_context from glsl_to_llvm_type()Samuel Pitoiset2018-02-121-13/+13
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: drop nir_to_llvm_context from visit_var_atomic()Samuel Pitoiset2018-02-121-7/+7
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: drop nir_to_llvm_context from visit_vulkan_resource_reindex()Samuel Pitoiset2018-02-121-5/+5
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: drop nir_to_llvm_context from visit_load_push_constant()Samuel Pitoiset2018-02-121-6/+7
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: drop nir_to_llvm_context from cast_ptr()Samuel Pitoiset2018-02-121-3/+3
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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