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* radv: fix scissor computation when using half-pixel viewport offsetSamuel Pitoiset2018-04-171-4/+4
| | | | | | | | | | | 'scale[i]' can be non-integer. Original patch by Philip Rebohle. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106074 Fixes: 0f3de89a56a ("radv: Use the guard band.") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Niuwenhuizen <[email protected]>
* anv,radv: Drop XML workarounds for VK_ANDROID_native_bufferJason Ekstrand2018-04-161-6/+1
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: clean up radv_decompress_resolve_subpass_src()Samuel Pitoiset2018-04-161-10/+7
| | | | | | | To handle the source color image transitions in the same place. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Niuwenhuizen <[email protected]>
* radv: don't fast-clear eliminate after resolving a subpass with computeSamuel Pitoiset2018-04-161-14/+0
| | | | | | | | | That looks useless, and I think radv_handle_image_transition() will do a fast-clear eliminate because it's called after the resolve. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Niuwenhuizen <[email protected]>
* radv: handle CMASK/FMASK transitions only if DCC is disabledSamuel Pitoiset2018-04-161-3/+1
| | | | | | | | DCC implies a fast-clear eliminate, so I think this sounds reasonable. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Niuwenhuizen <[email protected]>
* radv: merge radv_handle_{dcc,cmask}_image_transition() functionsSamuel Pitoiset2018-04-161-41/+17
| | | | | | | Into radv_handle_color_image_transition(). Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Niuwenhuizen <[email protected]>
* radv: add radv_init_color_image_metadata() helperSamuel Pitoiset2018-04-161-10/+41
| | | | | | | | In order to separate initialization from decompression. In the future, that will allow us to init DCC/FMASK/CMASK in one shot. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Niuwenhuizen <[email protected]>
* radv: make radv_initialise_cmask() staticSamuel Pitoiset2018-04-162-4/+2
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Niuwenhuizen <[email protected]>
* radv: clean up radv_handle_image_transition() a bitSamuel Pitoiset2018-04-161-11/+20
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Niuwenhuizen <[email protected]>
* radv: add radv_handle_color_image_transition() helperSamuel Pitoiset2018-04-161-9/+25
| | | | | | | To handle CMASK, FMASK and DCC transitions in the same place. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Niuwenhuizen <[email protected]>
* radv: handle DCC image transitions before CMASK/FMASK transitionsSamuel Pitoiset2018-04-161-5/+5
| | | | | | | | | Mostly because DCC implies a fast-clear eliminate and we should be able to skip some DCC decompressions by setting a predicate like for CMASK and FMASK. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Niuwenhuizen <[email protected]>
* radv: disable prediction only if it has been enabledSamuel Pitoiset2018-04-161-1/+1
| | | | | | | | | When decompressing DCC we don't enable it, so it's useless to disable it. This reduces the number of prediction packets sent to the GPU when performing color decompression passes. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Niuwenhuizen <[email protected]>
* ac/nir: Make the GFX9 buffer size fix apply to image loads/atomics too.Bas Nieuwenhuizen2018-04-161-17/+22
| | | | | | | | | No clue how I missed those ... Fixes: 4503ff760c "ac/nir: Add workaround for GFX9 buffer views." CC: <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105320 Reviewed-by: Nicolai Hähnle <[email protected]>
* radv: enable subgroup capabilitiesDaniel Schürmann2018-04-142-3/+14
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: handle subgroup intrinsicsDaniel Schürmann2018-04-141-29/+40
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: add LLVM build functions for subgroup instrinsicsDaniel Schürmann2018-04-142-1/+485
| | | | | Co-authored-by: Connor Abbott <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: make ballot and umsb capable of 64bit inputsDaniel Schürmann2018-04-141-9/+25
| | | | | Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* winsys/amdgpu: allow local BOs on APUsMarek Olšák2018-04-131-1/+2
| | | | | | | Local BOs ignore BO priorities, and we don't need those on APUs. Reviewed-by: Samuel Pitoiset <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* mesa: include mtypes.h lessMarek Olšák2018-04-125-0/+7
| | | | | | | | | | - remove mtypes.h from most header files - add main/menums.h for often used definitions - remove main/core.h v2: fix radv build Reviewed-by: Brian Paul <[email protected]>
* radv: Implement VK_EXT_vertex_attribute_divisor.Bas Nieuwenhuizen2018-04-126-11/+50
| | | | | | | Pretty straight forward, just pass the divisors through the shader key and then do a LLVM divide. Reviewed-by: Samuel Pitoiset <[email protected]>
* ac/surface: Allow S swizzle for displayable surfaces.Bas Nieuwenhuizen2018-04-121-2/+5
| | | | | | | | | | | For dcn1 && < 64 bpp displayable surfaces, addrlib only accepts S swizzles. At the same time addrlib prefers D swizzles is allowed, so we can just allow S swizzles as fallback. Fixes: b64b712558 "ac/surface/gfx9: request desired micro tile mode explicitly" Reviewed-by: Marek Olšák <[email protected]>
* radv: fix radv_layout_dcc_compressed() when image doesn't have DCCSamuel Pitoiset2018-04-121-1/+1
| | | | | | | | | | | | | | | | num_dcc_levels means that DCC is supported, but this doesn't mean that it's enabled by the driver. Instead, we should rely on radv_image_has_dcc(). This fixes some multisample regressions since 0babc8e5d66 ("radv: fix picking the method for resolve subpass") on Vega. This is because the resolve method changed from HW to FS, but those fails are totally unexpected, so there might some differences between Polaris and Vega here. Fixes: 44fcf587445 ("radv: Disable DCC for GENERAL layout and compute transfer dest.") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add radv_decompress_resolve_{subpass}_src() helpersSamuel Pitoiset2018-04-124-54/+73
| | | | | | | | This helper shares common code before resolving using either a fragment or a compute shader. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add radv_init_dcc_control_reg() helperSamuel Pitoiset2018-04-121-32/+52
| | | | | | | And add some comments. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: Enable RB+ on Raven.Bas Nieuwenhuizen2018-04-111-1/+2
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* vulkan: fix build issue on android (both anv/radv)Tapani Pälli2018-04-111-3/+3
| | | | | | | | | | Fixes linking errors against: anv_GetPhysicalDeviceImageFormatProperties2KHR radv_GetPhysicalDeviceImageFormatProperties2KHR Signed-off-by: Tapani Pälli <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radeonsi: pass -O halt_waves to umr for hang debuggingNicolai Hähnle2018-04-111-1/+1
| | | | | | | | | | | This will give us meaningful wave information in the case of a hang where shaders are still running in an infinite loop. Note that we call umr multiple times for different sections of the ddebug hang dump, and so the wave information will not necessarily match up between sections. Reviewed-by: Marek Olšák <[email protected]>
* vulkan: Drop vk_android_native_buffer.xmlJason Ekstrand2018-04-103-16/+8
| | | | | | | | All the information in vk_android_native_buffer.xml is now in vk.xml. The only exception is the extension type attribute which we can work around in the generators while we wait for the XML to be fixed. Reviewed-by: Dylan Baker <[email protected]>
* radv: Enable RB+ where possible.Bas Nieuwenhuizen2018-04-113-6/+151
| | | | | | | | | | | | | | | According to Marek, not enabling it on Stoney has a significant negative performance impact. (And I guess this might impact performance on Raven as well) The register settings are pretty much copied from radeonsi. I did not put this in the pipeline as that would make the pipeline more dependent on the format which mean we would have to have more pipelines for the meta shaders. v2: Don't clear RB+ regs if not enabled as the CLEAR_STATE packet does already. Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: fix picking the method for resolve subpassSamuel Pitoiset2018-04-101-1/+1
| | | | | | | | | | | The source and destination image parameters were swapped. No CTS changes on Polaris10, but I suspect this might fix something. Fixes: 2a04f5481df ("radv/meta: select resolve paths") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add shader BOs to the list at pipeline bind timeSamuel Pitoiset2018-04-101-3/+15
| | | | | | | | | | | | Otherwise, the shader BOs are not added to the list on SI because prefetching isn't supported. Calling radv_cs_add_buffer() in the prefetch codepath was a bad idea. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105952 Fixes: 4ad7595f35 ("radv: rename radv_emit_prefetch() to radv_emit_prefetch_L2") Signed-off-by: Samuel Pitoiset <[email protected]> Tested-by: Turo Lamminen <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/surface: don't set the display flag for obviously unsupported cases (v2)Marek Olšák2018-04-103-4/+32
| | | | | | | This enables the tile swizzle for some cases of the displayable micro mode, and it also fixes an addrlib assertion failure on Vega. Reviewed-by: Michel Dänzer <[email protected]>
* ac/surface/gfx9: request desired micro tile mode explicitlyMarek Olšák2018-04-101-4/+16
| | | | Tested-by: Dieter Nützel <[email protected]>
* ac/nir: Use an array instead of hashtable for SSA defs.Bas Nieuwenhuizen2018-04-101-9/+13
| | | | | | | | | Saves about 2% of compile time for F1 2017, as well as reduce code size of an optimized libvulkan_radeon.so by about 1 KiB. This still keeps the hashtable, as we also stored blocks in there. Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Always reset draw user SGPRs after secondary command buffer.Bas Nieuwenhuizen2018-04-091-14/+3
| | | | | | | | As we sometimes reset them to -1, -1 does not mean that they are not written by the secondary command buffer. Fixes: ad11fc3571 "radv: don't emit unneeded vertex state." Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Don't set instance count using predication.Bas Nieuwenhuizen2018-04-091-1/+1
| | | | | | | | | | The packet can sometimes be skipped, but we still think the change takes effect. This just makes the packet always take effect. Fixes: ad11fc3571 "radv: don't emit unneeded vertex state." Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105942 Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: fix prefetching of vertex shader and VBOs on SISamuel Pitoiset2018-04-091-1/+1
| | | | | | | | Forgot one check... Too many mistakes for a simple change. Fixes: f1d7c16e85 ("radv: fix prefetching compute shaders on CIK and older chips") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: implement VK_AMD_shader_core_propertiesSamuel Pitoiset2018-04-092-0/+41
| | | | | | | Simple extension that only returns information for AMD hw. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add RADV_NUM_PHYSICAL_VGPRS constantSamuel Pitoiset2018-04-092-2/+6
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add radv_get_num_physical_sgprs() helperSamuel Pitoiset2018-04-092-11/+10
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add radv_image_is_tc_compat_htile() helperSamuel Pitoiset2018-04-095-12/+21
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add radv_use_dcc_for_image() helperSamuel Pitoiset2018-04-091-30/+68
| | | | | | | And add some TODOs. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: rename radv_image_is_tc_compat_htile()Samuel Pitoiset2018-04-091-3/+3
| | | | | | | | | ... to radv_use_tc_compat_htile_for_image(). This function name makes more sense to me because we want to know if and only if TC-compat HTILE should be used. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: simplify a check in radv_initialise_color_surface()Samuel Pitoiset2018-04-091-1/+1
| | | | | | | | If the image has FMASK metadata, the number of samples is > 1 because radv_image_can_enable_fmask() handles that already. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: clean up radv_vi_dcc_enabled()Samuel Pitoiset2018-04-093-8/+12
| | | | | | | And rename to radv_dcc_enabled() to be consistent. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: clean up radv_htile_enabled()Samuel Pitoiset2018-04-091-6/+9
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add radv_image_has_{cmask,fmask,dcc,htile}() helpersSamuel Pitoiset2018-04-099-36/+72
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add radv_get_cmask_fast_clear_value() helperSamuel Pitoiset2018-04-091-1/+22
| | | | | | | | DCC for MSAA textures are currently unsupported but that will be used later on. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add radv_clear_{cmask,dcc} helpersSamuel Pitoiset2018-04-094-15/+29
| | | | | | | | They will help for DCC MSAA textures and if we support mipmaps in the future. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: don't pass the pipeline to radv_flush_constants()Samuel Pitoiset2018-04-061-5/+5
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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