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* radv: compute correct number of input vertices for NGGSamuel Pitoiset2019-07-101-1/+24
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: remove extra code for exporting LayerID to the next stageSamuel Pitoiset2019-07-101-17/+2
| | | | | | | | Now that the output usage mask is set to 0x1 the LayerID is correctly exported in the loop above. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: set the LayerId output usage mask if FS needs itSamuel Pitoiset2019-07-101-0/+17
| | | | | | | | When the stage preceding FS doesn't export it the fragment shader might read it, even if it's 0. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: Don't optimize after lowering FS inputsConnor Abbott2019-07-101-1/+0
| | | | | | | | | | | | | | | | | Currently this is done rather late in radv, after lowering booleans, so it isn't safe to run additional optimizations that may add e.g. 1-bit booleans. We could move the lowering parts earlier, but since right now we only lower FS inputs and by this point all indirects have been lowered away, there's no reason we should need to optimize anything. One shader from Devil May Cry 5 was getting optimized, but only because the optimization loop was working on 32-bit booleans which revealed an opportunity that was hidden with 1-bit booleans, and we generated a 1-bit boolean which is invalid. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111092 Fixes: 118a66df9907772bb9e5503b736c95d7bb62d52c Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* android: amd/addrlib: add gfx10 supportMauro Rossi2019-07-101-0/+1
| | | | | | | | | | | | | Fix the following building error: external/mesa/src/amd/addrlib/src/gfx10/gfx10addrlib.cpp:35:10: fatal error: 'gfx10_gb_reg.h' file not found ^~~~~~~~~~~~~~~~ 1 error generated. Fixes: 78cdf9a ("amd/addrlib: add gfx10 support") Signed-off-by: Mauro Rossi <[email protected]> Acked-by: Marek Olšák <[email protected]>
* android: amd/common/gfx10: add register JSONMauro Rossi2019-07-101-8/+26
| | | | | | | | | | | | | | | The necessary Android makefile building rules are added and the generation rules are simplified for readability Fixes the following building errors: external/mesa/src/amd/common/ac_llvm_build.c:1496:45: error: use of undeclared identifier 'V_008F0C_IMG_FORMAT_8_UINT' case V_008F0C_BUF_DATA_FORMAT_8: format = V_008F0C_IMG_FORMAT_8_UINT; break; ^ Fixes: 74a26af ("amd/common/gfx10: add register JSON") Signed-off-by: Mauro Rossi <[email protected]> Acked-by: Marek Olšák <[email protected]>
* android: radv: import include paths from used librariesChih-Wei Huang2019-07-101-11/+5
| | | | | | | | | It's unnecessary to manually add these include paths since they could be imported automatically. Signed-off-by: Chih-Wei Huang <[email protected]> Acked-by: Eric Engestrom <[email protected]> Acked-by: Emil Velikov <[email protected]>
* android: vulkan/util: fix export pathChih-Wei Huang2019-07-101-1/+0
| | | | | | | | | Export the correct include path so that the libraries use it can get it automatically. Signed-off-by: Chih-Wei Huang <[email protected]> Acked-by: Eric Engestrom <[email protected]> Acked-by: Emil Velikov <[email protected]>
* android: radv: fix improper use of LOCAL_WHOLE_STATIC_LIBRARIESChih-Wei Huang2019-07-101-2/+3
| | | | | | | | | | | The libmesa_git_sha1 is a dummy library. There is no reason to put it into LOCAL_WHOLE_STATIC_LIBRARIES. Move libmesa_vulkan_util to the vulkan.radv which really needs it. Signed-off-by: Chih-Wei Huang <[email protected]> Acked-by: Eric Engestrom <[email protected]> Acked-by: Emil Velikov <[email protected]>
* android: radv: remove unused LOCAL_EXPORT_C_INCLUDE_DIRSChih-Wei Huang2019-07-101-4/+0
| | | | | | | | | The vulkan module is the final HAL. No need to export its headers since none will import it. Signed-off-by: Chih-Wei Huang <[email protected]> Acked-by: Eric Engestrom <[email protected]> Acked-by: Emil Velikov <[email protected]>
* radeonsi/gfx10: set more registers and fieldsMarek Olšák2019-07-091-4/+14
| | | | | Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]> Acked-by: Dave Airlie <[email protected]>
* radeonsi/gfx10: enable 1D texturesMarek Olšák2019-07-092-0/+3
| | | | | Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]> Acked-by: Dave Airlie <[email protected]>
* radv: Add a common member in the union to make things more clear.Bas Nieuwenhuizen2019-07-094-50/+53
| | | | | | | This clarifies that the struct can be used when the shader can be one of VS/TES. Reviewed-by: Samuel Pitoiset <[email protected]>
* Revert "radv: keep track of whether NGG is used for GS on GFX10"Bas Nieuwenhuizen2019-07-093-10/+1
| | | | | | | | | | | This reverts commit 63e0675d986744a9ed2d9a15b7cba84ff4a24fc2. The GS is merged with the preceding shader and since the preceding shader will have as_ngg set the final binary will have is_ngg set. So we do not need the gs key here. Reviewed-by: Samuel Pitoiset <[email protected]>
* radv/gfx10: Use correct gs_out for tess point_mode.Bas Nieuwenhuizen2019-07-091-1/+4
| | | | | Fixes: 204e4da9b47 "radv: Use correct gs_out with tessellation." Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: set correct number of VGPRs for GS on GFX10Samuel Pitoiset2019-07-091-1/+1
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: fix VGT_ESGS_RING_ITEMSIZE for GS as NGG on GFX10Samuel Pitoiset2019-07-091-2/+7
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: emit VGT_GS_MAX_VERT_OUT for legacy and NGG paths for GSSamuel Pitoiset2019-07-091-2/+3
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: emit the geometry shader as NGG if enabled on GFX10Samuel Pitoiset2019-07-091-3/+7
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: keep track of whether NGG is used for GS on GFX10Samuel Pitoiset2019-07-093-1/+10
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: add radv_pipeline_generate_hw_gs() helperSamuel Pitoiset2019-07-091-9/+20
| | | | | | | For legacy GS path. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: fix setting VGT_REUSE_OFF for TES on GFX10Samuel Pitoiset2019-07-091-2/+7
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: fix computing the number of ES VGPRS for TES on GFX10Samuel Pitoiset2019-07-091-1/+2
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: set max workgroup size to 128 for TES as NGG on GFX10Samuel Pitoiset2019-07-091-1/+1
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: fix allocating USER SGPRs on GFX10Samuel Pitoiset2019-07-091-7/+8
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv/gfx10: Enable tess.Bas Nieuwenhuizen2019-07-091-1/+1
| | | | Reviewed-by: Dave Airlie <[email protected]>
* radv/gfx10: Add pipeline state support for tess.Bas Nieuwenhuizen2019-07-092-10/+45
| | | | Reviewed-by: Dave Airlie <[email protected]>
* radv/gfx10: Only set HW edge flags with gs & tess disabled.Bas Nieuwenhuizen2019-07-091-1/+2
| | | | Reviewed-by: Dave Airlie <[email protected]>
* radv/gfx10: Add tess eval ngg shader support.Bas Nieuwenhuizen2019-07-091-8/+17
| | | | Reviewed-by: Dave Airlie <[email protected]>
* radv: Use correct gs_out with tessellation.Bas Nieuwenhuizen2019-07-091-0/+3
| | | | | | | | We should use the primitives output by the TES in that case. There is always a separate TES if there is no GS. Reviewed-by: Dave Airlie <[email protected]>
* radv/gfx10: Use correct count of max_offchip_buffers.Bas Nieuwenhuizen2019-07-091-1/+4
| | | | Reviewed-by: Dave Airlie <[email protected]>
* radv/gfx10: Load global pointers in correct userdata registers for hs/gs.Bas Nieuwenhuizen2019-07-091-2/+2
| | | | | | Fixes: cfaad5e3cad "radv/gfx10: implement radv_emit_global_shader_pointers()" Reviewed-by: Dave Airlie <[email protected]>
* radv: only use specialised 3D meta paths on GFX9.Dave Airlie2019-07-092-16/+16
| | | | | | GFX10 appears to act like GFX8 here. Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: do not emit VGT_FLUSH on GFX10Samuel Pitoiset2019-07-081-2/+5
| | | | | | | We don't need it. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: Remove now-unused interp_deref handlingConnor Abbott2019-07-081-149/+0
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: Use NIR barycentric intrinsicsConnor Abbott2019-07-082-0/+8
| | | | | | | | This is simpler than radv, since the driver_location is already assigned for us. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radv: Use NIR barycentric intrinsicsConnor Abbott2019-07-083-191/+156
| | | | | | | | | We have to add a few lowering to deal with things that used to be dealt with inline when creating inputs. We also move the code that fills out the radv_shader_variant_info struct for linking purposes to radv_shader.c, as it's no longer tied to the NIR->LLVM lowering. Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: Implement barycentric intrinsicsConnor Abbott2019-07-081-0/+198
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radv: Make FragCoord a sysvalConnor Abbott2019-07-083-17/+4
| | | | | | | | | | load_fragcoord is already handled in common code for radeonsi, so we don't need to do anything to handle it. However, there were some passes creating NIR with the varying, so we switch them over to the sysval. In the case of nir_lower_input_attachments which is used by both radv and anv, we add handling for both until intel switches to using a sysval. Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: Lower input attachments in NIR.Daniel Schürmann2019-07-086-36/+10
| | | | | | | | v2 (Connor) - Fix warning in release mode using MAYBE_UNUSED Reviewed-by: Connor Abbott <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: Implement nir_intrinsic_load_layer_id().Daniel Schürmann2019-07-083-1/+9
| | | | | | Reviewed-by: Connor Abbott <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radv/gfx10: don't emit PFP packets on ME.Dave Airlie2019-07-081-2/+3
| | | | | | | | | | | This was done for all previous GPUs. This fixes Talos Principle launch hangs. Fixes: 7e43022e8c8 (radv/gfx10: add gfx10_cs_emit_cache_flush) Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: select the GFX ring when halting waves with UMR on GFX10Samuel Pitoiset2019-07-083-5/+10
| | | | | | | | GFX10 has two rings, so UMR want to know which one to halt. Select the first one by default. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv/gfx10: Move NGG output handling outside of giant if-statement.Bas Nieuwenhuizen2019-07-081-2/+10
| | | | | | | | | | | | In merged shaders we put a big if around each shader, so both stages can have a different number of threads. However, the NGG output code still needs to run if the first shader is not executed. This can happen when there are more gs threads than vs/es threads, or when there are 0 es/vs threads (why? no clue). Fixes: ee21bd7440c "radv/gfx10: implement NGG support (VS only)" Reviewed-by: Dave Airlie <[email protected]>
* radv: Actually use VK formats for the format table.Bas Nieuwenhuizen2019-07-071-48/+20
| | | | | | | | No ETC2 or ASTC on navi so nothing to add. Fixes: 3dc5ec5d167 "radv/gfx10: generate gfx10_format_table.h" Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Handle cmask being disallowed by addrlib.Bas Nieuwenhuizen2019-07-071-0/+5
| | | | | | | alignment=0 does weird things with align64. CC: <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv/gfx10: enable support for NAVI10, NAVI12 and NAVI14Samuel Pitoiset2019-07-071-3/+0
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv/gfx10: Use GS rectlist when needed.Bas Nieuwenhuizen2019-07-071-0/+2
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radv/gfx10: implement NGG support (VS only)Samuel Pitoiset2019-07-076-22/+610
| | | | | | | | | | This needs to be cleaned up a bit, and it probably contains missing stuff and/or bugs. This doesn't fix the "half of the triangles" issue. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: Combine vs and tes output keys parts.Bas Nieuwenhuizen2019-07-074-46/+48
| | | | | | That way the same deref is valid for both shader stages. Reviewed-by: Samuel Pitoiset <[email protected]>
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