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* nir/opt_peephole_select: Don't try to remove flow control around indirect loadsIan Romanick2018-12-171-1/+1
| | | | | | | | | | | | | | | | | | | That flow control may be trying to avoid invalid loads. On at least some platforms, those loads can also be expensive. No shader-db changes on any Intel platform (even with the later patch "intel/compiler: More peephole select"). v2: Add a 'indirect_load_ok' flag to nir_opt_peephole_select. Suggested by Rob. See also the big comment in src/intel/compiler/brw_nir.c. v3: Use nir_deref_instr_has_indirect instead of deref_has_indirect (from nir_lower_io_arrays_to_elements.c). v4: Fix inverted condition in brw_nir.c. Noticed by Lionel. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* radv: Fix multiview depth clearsBas Nieuwenhuizen2018-12-171-8/+21
| | | | | | | | We were not using the view mask for depth clears, causing only the first view to be cleared. Fixes: 2e86f6b2597 "radv: Add multiview clears." Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Remove redundant format check.Bas Nieuwenhuizen2018-12-171-4/+0
| | | | | | | | | The switch directly after the check has a default case that returns NULL too, so the effective return value is not changed. Also this check is wrong once we start dealing with formats introduced by an extension (e.g. YUV formats). Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: report Vulkan version 1.1.90 for realSamuel Pitoiset2018-12-171-1/+1
| | | | | | | | I thought the value was correctly propagated, but actually not. Fixes: 2ac6d55f38c ("radv: bump reported version to 1.1.90") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* anv,radv: Re-enable VK_EXT_pci_bus_infoJason Ekstrand2018-12-171-1/+1
| | | | | | | Now at version 2 with the fixed header. Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]>
* radv: switch from nir_bcsel to nir_b32cselRhys Perry2018-12-171-4/+4
| | | | | | Fixes: 191a1dce928 ('nir: Add 1-bit Boolean opcodes') Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: don't set surf_index for stencil-only imagesRhys Perry2018-12-171-1/+1
| | | | | | | | Fixes: f8d5b377c8b ('radv: set cb base tile swizzles for MRT speedups (v4)') Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108116 Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Fix a stupid if in gather_intrinsic_infoJason Ekstrand2018-12-161-9/+9
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* nir: Add a bool to int32 lowering passJason Ekstrand2018-12-161-0/+4
| | | | | | | | We also enable it in all of the NIR drivers. Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Tested-by: Bas Nieuwenhuizen <[email protected]>
* nir: Rename Boolean-related opcodes to include 32 in the nameJason Ekstrand2018-12-161-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a squash of a bunch of individual changes: nir/builder: Generate 32-bit bool opcodes transparently nir/algebraic: Remap Boolean opcodes to the 32-bit variant Use 32-bit opcodes in the NIR producers and optimizations Generated with a little hand-editing and the following sed commands: sed -i 's/nir_op_ball_fequal/nir_op_b32all_fequal/g' **/*.c sed -i 's/nir_op_bany_fnequal/nir_op_b32any_fnequal/g' **/*.c sed -i 's/nir_op_ball_iequal/nir_op_b32all_iequal/g' **/*.c sed -i 's/nir_op_bany_inequal/nir_op_b32any_inequal/g' **/*.c sed -i 's/nir_op_\([fiu]lt\)/nir_op_\132/g' **/*.c sed -i 's/nir_op_\([fiu]ge\)/nir_op_\132/g' **/*.c sed -i 's/nir_op_\([fiu]ne\)/nir_op_\132/g' **/*.c sed -i 's/nir_op_\([fiu]eq\)/nir_op_\132/g' **/*.c sed -i 's/nir_op_\([fi]\)ne32g/nir_op_\1neg/g' **/*.c sed -i 's/nir_op_bcsel/nir_op_b32csel/g' **/*.c Use 32-bit opcodes in the NIR back-ends Generated with a little hand-editing and the following sed commands: sed -i 's/nir_op_ball_fequal/nir_op_b32all_fequal/g' **/*.c sed -i 's/nir_op_bany_fnequal/nir_op_b32any_fnequal/g' **/*.c sed -i 's/nir_op_ball_iequal/nir_op_b32all_iequal/g' **/*.c sed -i 's/nir_op_bany_inequal/nir_op_b32any_inequal/g' **/*.c sed -i 's/nir_op_\([fiu]lt\)/nir_op_\132/g' **/*.c sed -i 's/nir_op_\([fiu]ge\)/nir_op_\132/g' **/*.c sed -i 's/nir_op_\([fiu]ne\)/nir_op_\132/g' **/*.c sed -i 's/nir_op_\([fiu]eq\)/nir_op_\132/g' **/*.c sed -i 's/nir_op_\([fi]\)ne32g/nir_op_\1neg/g' **/*.c sed -i 's/nir_op_bcsel/nir_op_b32csel/g' **/*.c Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Tested-by: Bas Nieuwenhuizen <[email protected]>
* ac: split 16-bit ssbo loads that may not be dword alignedRhys Perry2018-12-161-0/+2
| | | | | | | Fixes: 7e7ee826982 ('ac: add support for 16bit buffer loads') Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108114 Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* ac: refactor visit_load_bufferRhys Perry2018-12-162-44/+42
| | | | | | | This is so that we can split different types of loads more easily. Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radv/xfb: fix counter buffer bounds checks.Dave Airlie2018-12-131-2/+2
| | | | | | | | | | | | If we gave this function 0 counter buffers, we'd still try and access pCounterBuffers[0] as this check was incorrect. Fixes crash with ext_transform_feedback-pipeline-basic-primgen on zink on radv. Fixes: 677b496b6 (radv: fix begin/end transform feedback with 0 counter buffers.) Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: don't check if format is depth in radv_image_can_enable_hile()Samuel Pitoiset2018-12-131-1/+0
| | | | | | | This is always TRUE if htile_size is not 0. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: check if addrlib enabled HTILE in radv_image_can_enable_htile()Samuel Pitoiset2018-12-131-1/+2
| | | | | | | | When hile_size is 0, we can't enable HTILE. This doesn't change anything, except not calling radv_image_alloc_htile(). Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: switch on EOP when primitive restart is enabled with triangle stripsSamuel Pitoiset2018-12-131-2/+1
| | | | | | | | | | Otherwise, Yakuza hangs the GPU with DXVK. We don't know if linetrip and pointlist are affected, so my point is to do that only for triangle strips. Cc: [email protected] Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: allow to skip DCC decompressions with the new predicateSamuel Pitoiset2018-12-131-6/+13
| | | | | | | | | | Feral games aren't affected because they don't decompress DCC. F1 2018 has one DCC decompression per frame, but I don't see any performance improvements. This new predicate will be probably more useful for DCC/MSAA. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add a predicate for reflecting DCC decompression stateSamuel Pitoiset2018-12-135-1/+44
| | | | | | | It's somehow similar to the FCE predicate. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: bump reported version to 1.1.90Samuel Pitoiset2018-12-121-1/+1
| | | | | | | | After going through the spec changelog, it looks like RADV is up to date. Note that ANV also reports 1.1.90. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* anv,radv: Disable VK_EXT_pci_bus_infoJason Ekstrand2018-12-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | The Vulkan working group recently discovered that we made a mistake in assuming that PCI domains are 16-bit even though they can potentially be 32-bit values. To fix this, the next spec update will change the types in the VK_EXT_pci_bus_info struct to be 32 bits which will be a backwards-incompatible change. Normally, Khronos tries very hard to never make backwards incompatible changes to specs. Hopefully, the extension is new enough (2 months) that there are no shipping apps which use the extension so this should be safe. This commit disables the extension for both anv and radv in mesa and should be back-ported to 18.3 ASAP so we avoid any potential issues with new apps running on old drivers. I'll send out a commit (which we can also back-port to 18.3 if we really care) to re-enable the extension in both drivers once this week's spec update ships. The one known use of this extension is internal to mesa and will continue working with the extension disabled and will naturally update when we get a new header. Cc: "18.3" <[email protected]> Acked-by: Lionel Landwerlin <[email protected]> Acked-by: Samuel Pitoiset <[email protected]>
* amd/addrlib: drop si_ci_vi_merged_enum.h from the listEmil Velikov2018-12-101-1/+0
| | | | | Fixes: 776b9113656 ("amd/addrlib: update Mesa's copy of addrlib") Signed-off-by: Emil Velikov <[email protected]>
* amd: remove support for LLVM 6.0Samuel Pitoiset2018-12-0614-325/+47
| | | | | | | User are encouraged to switch to LLVM 7.0 released in September 2018. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* nir: Make boolean conversions sized just like the othersJason Ekstrand2018-12-051-4/+8
| | | | | | | | | Instead of a single i2b and b2i, we now have i2b32 and b2iN where N is one if 8, 16, 32, or 64. This leads to having a few more opcodes but now everything is consistent and booleans aren't a weird special case anymore. Reviewed-by: Connor Abbott <[email protected]>
* radv: expose VK_EXT_scalar_block_layoutSamuel Pitoiset2018-12-052-0/+7
| | | | | | | | | | | | Nothing to do, the compiler already handles that. All new dEQP.VK.ubo.* and dEQP.VK.ssbo.* pass, except some 16-bit tests that are quite related to fdo bug #108114. Only enable the extension on CIK+ because it might not work on SI. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: wait on the high 32 bits of timestamp queriesSamuel Pitoiset2018-12-051-1/+4
| | | | | | | | In case we are unlucky if the low part is 0xffffffff. Fixes: 5d6a560a29 ("radv: do not use the availability bit for timestamp queries") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: reset pending_reset_query when flushing cachesSamuel Pitoiset2018-12-052-1/+5
| | | | | | | | | | | | | If the driver used a compute shader for resetting a query pool, it should be completed when caches are flushed. This might reduce the number of stalls if operations are done between vkCmdResetQueryPool() and vkCmdBeginQuery() (or vkCmdWriteTimestamp()). Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Alex Smith <[email protected]>
* radv: Flush before vkCmdWriteTimestamp() if neededAlex Smith2018-12-051-11/+19
| | | | | | | | | | | As done for vkCmdBeginQuery() already. Prevents timestamps from being overwritten by previous vkCmdResetQueryPool() calls if the shader path was used to do the reset. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108925 Fixes: a41e2e9cf5 ("radv: allow to use a compute shader for resetting the query pool") Signed-off-by: Alex Smith <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: rework the TC-compat HTILE hardware bug with COND_EXECSamuel Pitoiset2018-12-053-28/+81
| | | | | | | | | | | | | | | | | | | | After investigating on this, it appears that COND_WRITE doesn't work correctly in some situations. I don't know exactly why does it fail to update DB_Z_INFO.ZRANGE_PRECISION, but as AMDVLK also uses COND_EXEC I think there is a reason. Now the driver stores a new metadata value in order to reflect the last fast depth clear state. If a TC-compat HTILE is fast cleared with 0.0f, we have to update ZRANGE_PRECISION to 0 in order to work around that hardware bug. This fixes rendering issues with The Forest and DXVK and doesn't seem to introduce any regressions. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108914 Fixes: 68dead112e7 ("radv: update the ZRANGE_PRECISION value for the TC-compat bug") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: use 3d shader for gfx9 copies if dst is 3dDave Airlie2018-12-041-1/+1
| | | | | | | | This fixes some crucible 3d miptree tests I've been working on when executed using the compute shader path. Fixes: d08f267814 (radv/gfx9: fix 3d image to image transfers on compute queues.) Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Check for shareable images in central place.Bas Nieuwenhuizen2018-12-041-5/+5
| | | | | | One place to put the logic makes things easier to change. Reviewed-by: Samuel Pitoiset <[email protected]>
* radv/android: Use buffer metadata to determine scanout compat.Bas Nieuwenhuizen2018-12-043-35/+93
| | | | | | | | These days we don't always allocate scanout compatible textures anymore. That does mean we have to fix the radv android WSI though. Fixes: b1444c9ccb0 "radv: Implement VK_ANDROID_native_buffer." Acked-by: Samuel Pitoiset <[email protected]>
* radv/android: Mark android WSI image as shareable.Bas Nieuwenhuizen2018-12-041-1/+11
| | | | | Fixes: b1444c9ccb0 "radv: Implement VK_ANDROID_native_buffer." Acked-by: Samuel Pitoiset <[email protected]>
* amd/vulkan: meson build - use radv_deps for libvulkan_radeonTobias Klausmann2018-12-031-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without this the build breaks with: FAILED: src/amd/vulkan/src@amd@vulkan@@vulkan_radeon@sha/radv_pipeline.c.o cc -Isrc/amd/vulkan/src@amd@vulkan@@vulkan_radeon@sha -Isrc/amd/vulkan -I../src/amd/vulkan -Isrc/../include -I../src/../include -Isrc -I../src -Isrc/mapi -I../src/mapi -Isrc/mesa -I../src/mesa -I../src/gallium/include -Isrc/gallium/auxiliary -I../src/gallium/auxiliary -Isrc/amd -I../src/amd -Isrc/amd/common -I../src/amd/common -Isrc/compiler -I../src/compiler -Isrc/vulkan/util -I../src/vulkan/util -Isrc/vulkan/wsi -I../src/vulkan/wsi -Isrc/compiler/nir -I../src/compiler/nir -I/usr/include -I/usr/include/libdrm -fdiagnostics-color=always -pipe -D_FILE_OFFSET_BITS=64 -Wall -Winvalid-pch -std=c99 -O2 -g '-DVERSION="18.3.0-rc5"' -DPACKAGE_VERSION=VERSION '-DPACKAGE_BUGREPORT="https://bugs.freedesktop.org/enter_bug.cgi?product=Mesa"' -DGLX_USE_TLS -DHAVE_ST_VDPAU -DENABLE_ST_OMX_BELLAGIO=0 -DENABLE_ST_OMX_TIZONIA=0 -DHAVE_X11_PLATFORM -DGLX_INDIRECT_RENDERING -DGLX_DIRECT_RENDERING -DGLX_USE_DRM -DHAVE_DRM_PLATFORM -DENABLE_SHADER_CACHE -DHAVE___BUILTIN_BSWAP32 -DHAVE___BUILTIN_BSWAP64 -DHAVE___BUILTIN_CLZ -DHAVE___BUILTIN_CLZLL -DHAVE___BUILTIN_CTZ -DHAVE___BUILTIN_EXPECT -DHAVE___BUILTIN_FFS -DHAVE___BUILTIN_FFSLL -DHAVE___BUILTIN_POPCOUNT -DHAVE___BUILTIN_POPCOUNTLL -DHAVE___BUILTIN_UNREACHABLE -DHAVE_FUNC_ATTRIBUTE_CONST -DHAVE_FUNC_ATTRIBUTE_FLATTEN -DHAVE_FUNC_ATTRIBUTE_MALLOC -DHAVE_FUNC_ATTRIBUTE_PURE -DHAVE_FUNC_ATTRIBUTE_UNUSED -DHAVE_FUNC_ATTRIBUTE_WARN_UNUSED_RESULT -DHAVE_FUNC_ATTRIBUTE_WEAK -DHAVE_FUNC_ATTRIBUTE_FORMAT -DHAVE_FUNC_ATTRIBUTE_PACKED -DHAVE_FUNC_ATTRIBUTE_RETURNS_NONNULL -DHAVE_FUNC_ATTRIBUTE_VISIBILITY -DHAVE_FUNC_ATTRIBUTE_ALIAS -DHAVE_FUNC_ATTRIBUTE_NORETURN -DUSE_SSE41 -DUSE_GCC_ATOMIC_BUILTINS -DUSE_X86_64_ASM -DMAJOR_IN_SYSMACROS -DHAVE_SYS_SYSCTL_H -DHAVE_LINUX_FUTEX_H -DHAVE_ENDIAN_H -DHAVE_DLFCN_H -DHAVE_STRTOF -DHAVE_MKOSTEMP -DHAVE_POSIX_MEMALIGN -DHAVE_TIMESPEC_GET -DHAVE_MEMFD_CREATE -DHAVE_STRTOD_L -DHAVE_DLADDR -DHAVE_DL_ITERATE_PHDR -DHAVE_ZLIB -DHAVE_PTHREAD -DHAVE_PTHREAD_SETAFFINITY -DHAVE_LIBDRM -DHAVE_LLVM=0x0600 -DMESA_LLVM_VERSION_PATCH=1 -DHAVE_WAYLAND_PLATFORM -DWL_HIDE_DEPRECATED -DHAVE_DRI3 -DHAVE_DRI3_MODIFIERS -Werror=implicit-function-declaration -Werror=missing-prototypes -Werror=return-type -fno-math-errno -fno-trapping-math -Wno-missing-field-initializers -Wno-format-truncation -O2 -Wall -D_FORTIFY_SOURCE=2 -fstack-protector-strong -funwind-tables -fasynchronous-unwind-tables -fstack-clash-protection -DNDEBUG -fPIC -pthread -D__STDC_FORMAT_MACROS -D_GNU_SOURCE -D__STDC_CONSTANT_MACROS -D__STDC_LIMIT_MACROS -fvisibility=hidden -Wno-override-init -DVK_USE_PLATFORM_XCB_KHR -DVK_USE_PLATFORM_XLIB_KHR -DVK_USE_PLATFORM_WAYLAND_KHR -DVK_USE_PLATFORM_DISPLAY_KHR -DVK_USE_PLATFORM_XLIB_XRANDR_EXT -MD -MQ 'src/amd/vulkan/src@amd@vulkan@@vulkan_radeon@sha/radv_pipeline.c.o' -MF 'src/amd/vulkan/src@amd@vulkan@@vulkan_radeon@sha/radv_pipeline.c.o.d' -o 'src/amd/vulkan/src@amd@vulkan@@vulkan_radeon@sha/radv_pipeline.c.o' -c ../src/amd/vulkan/radv_pipeline.c In file included from ../src/vulkan/util/vk_alloc.h:29, from ../src/amd/vulkan/radv_private.h:52, from ../src/amd/vulkan/radv_debug.h:27, from ../src/amd/vulkan/radv_pipeline.c:30: ../src/../include/vulkan/vulkan.h:54:10: fatal error: wayland-client.h: Datei oder Verzeichnis nicht gefunden #include <wayland-client.h> ^~~~~~~~~~~~~~~~~~ compilation terminated. The above command misses the include directory for wayland: -I/usr/include/wayland The missing include is contained in the (until now) unused radv_deps: if with_platform_wayland radv_deps += dep_wayland_client radv_flags += '-DVK_USE_PLATFORM_WAYLAND_KHR' libradv_files += files('radv_wsi_wayland.c') endif Fixes: 673dda83307 "meson: build "radv" vulkan driver for radeon hardware" Signed-off-by: Tobias Klausmann <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Dylan Baker <[email protected]>
* android: amd/addrlib: update Mesa's copy of addrlibMauro Rossi2018-12-011-6/+5
| | | | | | | | Needed to fix build error in addrlib in mesa for Android Fixes: 776b911 ("amd/addrlib: update Mesa's copy of addrlib") Signed-off-by: Mauro Rossi <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* amd/addrlib: update Mesa's copy of addrlibNicolai Hähnle2018-11-2935-11401/+859
| | | | | | | | Update to the internal master as of 2018-11-15. This has a lot of gratuitous whitespace change, but on the plus side it's built using the same tooling that's used for AMDVLK, which should help going forward.
* ac/surface/gfx9: let addrlib choose the preferred swizzle kindNicolai Hähnle2018-11-291-18/+4
| | | | | | | | | Our choices here are simply redundant as long as sin.flags is set correctly. (v2: - remove unused function parameter) Reviewed-by: Marek Olšák <[email protected]>
* radv: remove dependency on addrlib gfx9_enum.hNicolai Hähnle2018-11-293-9/+9
| | | | | | | v2: - use SI_CONTEXT_REG_OFFSET Reviewed-by: Dave Airlie <[email protected]>
* radv: drop few useless state changes when doing color/depth decompressionsSamuel Pitoiset2018-11-292-61/+41
| | | | | | | Viewport/scissor don't need to be updated for array textures. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: remove unused pending_clears param in the transition pathSamuel Pitoiset2018-11-291-11/+6
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: optimize CmdClear{Color,DepthStencil}Image() for layered texturesSamuel Pitoiset2018-11-291-4/+86
| | | | | | | | | | | If all layers are bound we can perform a fast color or depth clear instead of iterating over all layers. This has the advantage to avoid trashing the framebuffer for nothing if you we end up by doing a fast clear when calling radv_clear_image_layer(), and clearing all layers in one shot is obviously faster. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: refactor the fast clear path for better re-useSamuel Pitoiset2018-11-291-38/+40
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: simplify a check in emit_fast_color_clear()Samuel Pitoiset2018-11-291-3/+1
| | | | | | | Currently only true if RADV_PERFTEST=dccmsaa is set. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add radv_can_fast_clear_{color,depth}() helpersSamuel Pitoiset2018-11-291-44/+89
| | | | | | | For further optimisations. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add radv_image_view_can_fast_clear() helperSamuel Pitoiset2018-11-291-20/+27
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add radv_image_can_fast_clear() helperSamuel Pitoiset2018-11-291-29/+39
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: remove useless check in emit_fast_color_clear()Samuel Pitoiset2018-11-291-3/+0
| | | | | | | The driver doesn't support DCC/CMASK for mipmapped textures. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: Align large buffers to the fragment size.Bas Nieuwenhuizen2018-11-271-1/+5
| | | | | | | | | | | | | | | | Improves performance in Talos by about 15% (and significant improvements in RotR and possibly other but did not bench with final patch) on kernel 4.19 and earlier. On 4.20+ a similar effect comes from 433ca054949a "drm/amdgpu: try allocating VRAM as power of two" v2: Do not impact the alignment of the physical memory. Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> CC: <[email protected]>
* radv: Clamp gfx9 image view extents to the allocated image extents.Bas Nieuwenhuizen2018-11-271-4/+2
| | | | | | | | | | | Mirrors AMDVLK. Looks like if we go over the alignment of height we actually start to change the addressing. Seems like the extra miplevels actually work with this. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108245 Fixes: f6cc15dccd5 "radv/gfx9: fix block compression texture views. (v2)" Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Fix opaque metadata descriptor last layer.Bas Nieuwenhuizen2018-11-261-1/+1
| | | | | | | | | We used the layer count which results in an off by one error. Not sure this really affects anything. Fixes: f4e499ec791 "radv: add initial non-conformant radv vulkan driver" Reviewed-by: Dave Airlie <[email protected]>
* radv: ignore subpass self-dependencies for CreateRenderPass() tooSamuel Pitoiset2018-11-231-0/+10
| | | | | | | We really need to refactor this... Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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