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* nir: Get rid of nir_shader::stageJason Ekstrand2017-10-203-26/+26
| | | | | | | | It's redundant with nir_shader::info::stage. Acked-by: Timothy Arceri <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]>
* radv: use optimal packet order for drawsSamuel Pitoiset2017-10-201-17/+79
| | | | | | | | | Ported from RadeonSI. The time where shaders are idle should be shorter now. This can give a little boost, like +6% with the dynamicubo Vulkan demo. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add radv_emit_shaders_prefetch()Samuel Pitoiset2017-10-201-12/+19
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add radv_emit_shader_prefetch()Samuel Pitoiset2017-10-201-25/+23
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: don't flush the VS when srcStageMask == TOP_OF_PIPE_BITFredrik Höglund2017-10-201-2/+1
| | | | | | | | | | | | The Vulkan specification says: "... an execution dependency with only VK_PIPELINE_STAGE_TOP_OF_- PIPE_BIT in the source stage mask will effectively not wait for any prior commands to complete." Signed-off-by: Fredrik Höglund <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: mark total_count as MAYBE_UNUSED in CmdSet{Viewport,Scissor}Samuel Pitoiset2017-10-201-2/+2
| | | | | | Fixes two compilation warnings in release build. Trivial. Signed-off-by: Samuel Pitoiset <[email protected]>
* radv: rename radv_cmd_buffer_flush_state() to radv_draw()Samuel Pitoiset2017-10-201-59/+51
| | | | | | | Similar to the dispatch codepath. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: emit primitive restart from radv_emit_draw_registers()Samuel Pitoiset2017-10-201-29/+30
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add radv_emit_draw_registers()Samuel Pitoiset2017-10-201-12/+34
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: refactor indirect draws (+count buffer) with radv_draw_infoSamuel Pitoiset2017-10-201-103/+48
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: refactor indirect draws with radv_draw_infoSamuel Pitoiset2017-10-201-75/+133
| | | | | | | | Indirect draws with a count buffer will be refactored in a separate patch. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: refactor simple and indexed draws with radv_draw_infoSamuel Pitoiset2017-10-201-68/+118
| | | | | | | | | Similar to the dispatch compute logic but for draw calls. For convenience, indirect draws will be converted in a separate patch. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: re-emit VGT_INDEX_TYPE because non-indexed draws overwrite itSamuel Pitoiset2017-10-201-2/+11
| | | | | | | | | Only on CIK and later. We should only update VGT_INDEX_TYPE but it seems easier to re-emit all the index buffer packets. Fixes: 966d66f28f (radv: do not re-emit the index buffer for every draw call) Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: clear the dirty flags in the corresponding emit helpersSamuel Pitoiset2017-10-201-2/+8
| | | | | | | This will allow us to fix the VGT_INDEX_TYPE issue properly. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: rename RADV_CMD_DIRTY_RENDER_TARGETS to RADV_CMD_DIRTY_FRAMEBUFFERSamuel Pitoiset2017-10-202-3/+3
| | | | | | | To be consistent with the emit function name. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: move DB_COUNT_CONTROL initialization to si_emit_config()Samuel Pitoiset2017-10-202-1/+5
| | | | | | | CLEAR_STATE will initialize DB_COUNT_CONTROL to 0 for CIK+. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: enable GS on GFX9Bas Nieuwenhuizen2017-10-201-3/+1
| | | | Reviewed-by: Dave Airlie <[email protected]>
* radv: calculate and emit GFX9 GS registers to pipeline state.Bas Nieuwenhuizen2017-10-204-7/+158
| | | | Reviewed-by: Dave Airlie <[email protected]>
* ac/nir: Fix up GS input vgprs.Bas Nieuwenhuizen2017-10-201-0/+15
| | | | Reviewed-by: Dave Airlie <[email protected]>
* ac/nir: Add loading from LDS for merged GS.Bas Nieuwenhuizen2017-10-201-15/+21
| | | | Reviewed-by: Dave Airlie <[email protected]>
* ac/nir: Add ES output to LDS for GFX9.Bas Nieuwenhuizen2017-10-201-8/+49
| | | | Reviewed-by: Dave Airlie <[email protected]>
* ac/nir: Add merged GS function.Bas Nieuwenhuizen2017-10-201-17/+63
| | | | | | [airlied: merged fixup + and fixed up a couple more bits]. Reviewed-by: Dave Airlie <[email protected]>
* radv: Only emit TES when it exists.Bas Nieuwenhuizen2017-10-201-4/+6
| | | | Reviewed-by: Dave Airlie <[email protected]>
* radv: Use control shader presence for detecting tess.Bas Nieuwenhuizen2017-10-201-1/+1
| | | | Reviewed-by: Dave Airlie <[email protected]>
* radv: fixup tess eval shader when combined.Dave Airlie2017-10-202-6/+23
| | | | | | | | | | This fixes some access to the tess eval shader when it's combined with geometry on gfx9. This is a review of Bas's commit: radv: Prevent crashing by accessing TES for VGT reuse depth. Signed-off-by: Dave Airlie <[email protected]>
* radv: Set VGT_GS_MODE properly for gfx9Bas Nieuwenhuizen2017-10-201-4/+7
| | | | Reviewed-by: Dave Airlie <[email protected]>
* radv: ensure correct outinfo is picked.Dave Airlie2017-10-201-13/+14
| | | | | | | | | | | | | This struct used to rely on being in a union, it isn't anymore, so we have to pick the correct outinfo struct now. This should fix a regression since the union became a struct. dEQP-VK.tessellation.geometry_interaction.point_size.vertex_set_geometry_set Fixes: 6078a3bd51 (ac/nir: Allow ac_shader_variant_info to contain info about multiple stages.) Reviewed-by: Timothy Arceri <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: Enable tessellation shaders for GFX9.Bas Nieuwenhuizen2017-10-201-1/+1
| | | | | | It mostly works now. Reviewed-by: Dave Airlie <[email protected]>
* ac/nir: init full exec mask for merged shaders.Dave Airlie2017-10-203-0/+12
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: drop unused r600_htile_info.Dave Airlie2017-10-201-9/+0
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: fix CLEAR_STATE packet length.Dave Airlie2017-10-191-1/+1
| | | | | | | | | | Looking at shader traces I noticed some registers were missing, one of them was being eaten by the wrong clear state length. Fixes: 4f42ea4dc (radv: use CLEAR_STATE for initializing some registers) Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: copy indirect lowering settings from radeonsiTimothy Arceri2017-10-201-1/+26
| | | | | | | | | | | | | | It looks the original indirect mask was probably copied from ANV. Sascha Willems demo results: tessellation ~4000 -> ~4200 fps V2: continue lowering local indirects due to llvm deficiencies. Tested-by: Alex Smith <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: stop redundant setting of active_stagesTimothy Arceri2017-10-201-2/+0
| | | | | | We already set it when above in the nir compilation loop. Reviewed-by: Samuel Pitoiset <[email protected]>
* ac: move some code out of loop in store_tcs_output()Timothy Arceri2017-10-201-5/+5
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Modify rsrc1/rsrc2 generation for merged tess.Bas Nieuwenhuizen2017-10-191-7/+16
| | | | | | | No OC_LDS_EN for HS, and the included LS vgpr_comp_cnt is at a different offset. Reviewed-by: Dave Airlie <[email protected]>
* radv: Set correct registers for merged shader rings.Bas Nieuwenhuizen2017-10-191-12/+24
| | | | | | We need different regs to end up in s0/s1. Reviewed-by: Dave Airlie <[email protected]>
* radv: Add GFX9 HS emitting code.Bas Nieuwenhuizen2017-10-191-5/+16
| | | | Reviewed-by: Dave Airlie <[email protected]>
* radv: Remove remaining hard coded references to VS.Bas Nieuwenhuizen2017-10-193-7/+28
| | | | Reviewed-by: Dave Airlie <[email protected]>
* radv: Update GFX9 user data regs for GS/tess.Bas Nieuwenhuizen2017-10-194-14/+25
| | | | Reviewed-by: Dave Airlie <[email protected]>
* radv: Add code to compile merged shaders.Bas Nieuwenhuizen2017-10-194-13/+39
| | | | Reviewed-by: Dave Airlie <[email protected]>
* ac/nir: Add LS-HS input VGPR workaround.Bas Nieuwenhuizen2017-10-191-0/+18
| | | | Reviewed-by: Dave Airlie <[email protected]>
* ac/nir: Compile the bodies of multiple shaders.Bas Nieuwenhuizen2017-10-191-50/+83
| | | | Reviewed-by: Dave Airlie <[email protected]>
* ac/nir: Expand user SGPR descriptions a bit.Bas Nieuwenhuizen2017-10-191-3/+3
| | | | | | To prevent VS/TCS collisions in merged shaders. Reviewed-by: Dave Airlie <[email protected]>
* ac/nir: Don't write to the dynamic HS word on GFX9.Bas Nieuwenhuizen2017-10-191-11/+16
| | | | Reviewed-by: Dave Airlie <[email protected]>
* ac/nir: Add function creation for merged LS+HS.Bas Nieuwenhuizen2017-10-191-76/+178
| | | | Reviewed-by: Dave Airlie <[email protected]>
* ac/nir: Make scan_shader_output_decl less dependent on the context.Bas Nieuwenhuizen2017-10-191-14/+17
| | | | Reviewed-by: Dave Airlie <[email protected]>
* ac/nir: Allow ac_shader_variant_info to contain info about multiple stages.Bas Nieuwenhuizen2017-10-191-1/+1
| | | | Reviewed-by: Dave Airlie <[email protected]>
* ac/nir: Change interface to allow multiple source shaders.Bas Nieuwenhuizen2017-10-193-39/+48
| | | | Reviewed-by: Dave Airlie <[email protected]>
* ac/nir: Add HS calling convention.Bas Nieuwenhuizen2017-10-191-1/+4
| | | | | | Needed for GFX9 merged shaders. Reviewed-by: Dave Airlie <[email protected]>
* ac: Parse the new HS RSRC1 register.Bas Nieuwenhuizen2017-10-191-0/+1
| | | | Reviewed-by: Dave Airlie <[email protected]>
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