| Commit message (Collapse) | Author | Age | Files | Lines |
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At the moment (albeit unlikely) one could get link-time issues, since
libdrm_amdgpu.so is before it's users in the link chain.
Signed-off-by: Emil Velikov <[email protected]>
Reviewed-by: Dave Airlie <[email protected]>
Reviewed-by: Edward O'Callaghan <[email protected]>
Acked-by: Bas Nieuwenhuizen <[email protected]>
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The letter C was missing, thus in turn all the internal symbols were
exported.
As a result we hide ~150 symbols and cut ~36K from libvulkan_radeon.so.
Signed-off-by: Emil Velikov <[email protected]>
Reviewed-by: Dave Airlie <[email protected]>
Acked-by: Bas Nieuwenhuizen <[email protected]>
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Private/internal symbols should not be exported. Using the CXXFLAGS cuts
~300 exported symbols and ~23K from libvulkan_radeon.so.
Signed-off-by: Emil Velikov <[email protected]>
Acked-by: Bas Nieuwenhuizen <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Signed-off-by: Dave Airlie <[email protected]>
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These were changed in LLVM r284024.
v2:
- Only use float types for vdata of llvm.amdgcn.image.store. LLVM doesn't
support integer types for this intrinsic.
Signed-off-by: Dave Airlie <[email protected]>
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Signed-off-by: Dave Airlie <[email protected]>
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The identity swizzle should operate exactly
like an .r = R, .g = G, .b = B, .a = A swizzle.
This fixes a bunch of the 16-bit BGRA blit tests
dEQP-VK.api.copy_and_blit.blit_image.all_formats.b4g4r4a4*
Signed-off-by: Dave Airlie <[email protected]>
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dota2 does multiple acquires followed by multiple queues,
this bug manifested itself as a hang in the xshmfence code
randomly when dota2 was doing it's menus. It also occured
when running dota2 under phoronix-test-suite.
The fix is once the image is acquired to mark it busy then
so nobody else can acquire. We have to trust vulkan apps
that they will eventually submit it.
Acked-by: Edward O'Callaghan <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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If pPhysicalDevices is too small for all physical devices,
the driver must return VK_INCOMPLETE. Since only a single
physical device is supported, this is only the case when
pPhysicalDeviceCount == 0 && pPhysicalDevices != NULL.
Signed-off-by: Dave Airlie <[email protected]>
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Otherwise they'll be missing from the tarball and the build will fail.
Signed-off-by: Emil Velikov <[email protected]>
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Relocate a 'default:' to the end of a case stmt and fix an
indent issue.
Signed-off-by: Edward O'Callaghan <[email protected]>
Reviewed-by: Thomas Helland <[email protected]>
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It's supposed to be how much at least we want to grow the cs, not the
minimum size of the cs after growth.
v2: Unbreak use_ib_bos.
Don't mask the ib_size when !use_ib_bos, since it's not needed.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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Signed-off-by: Dave Airlie <[email protected]>
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This gets rid of "may be used uninitialized" compiler warnings.
Signed-off-by: Dave Airlie <[email protected]>
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Signed-off-by: Dave Airlie <[email protected]>
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As pointed out by Emil this isn't used in anv anymore,
and it was totally unused in radv anyways.
Signed-off-by: Dave Airlie <[email protected]>
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radv really doesn't need different dispatch per gen yet,
there really isn't that many differences yet.
Signed-off-by: Dave Airlie <[email protected]>
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This is leftover from anv, and we really never needed it.
Signed-off-by: Dave Airlie <[email protected]>
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This checks the kernel driver name is amdgpu before calling
libdrm_amdgpu.
This avoids the following error:
amdgpu_device_initialize: DRM version is 1.6.0 but this driver is only compatible with 3.x.x
when run on a machine with i915 graphics as well as amdgpu.
Signed-off-by: Dave Airlie <[email protected]>
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Inspired by patch from Edward O'Callaghan <[email protected]>
which didn't do it right.
Signed-off-by: Dave Airlie <[email protected]>
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Probably unlikely however ensure we don't leak a heap allocation
on the fail path.
V.2:
also fix missing 'amdgpu_device_deinitialize()' calls (Emil Velikov).
Signed-off-by: Edward O'Callaghan <[email protected]>
Reviewed-by: Emil Velikov <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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Drop/add a few newlines where appropriate and drop a couple of
unnessary braces.
Signed-off-by: Edward O'Callaghan <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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The static library is analogous to the intel ISL, which is required for
both hardware and (to be added) testing library.
Signed-off-by: Emil Velikov <[email protected]>
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Signed-off-by: Emil Velikov <[email protected]>
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Signed-off-by: Emil Velikov <[email protected]>
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Signed-off-by: Edward O'Callaghan <[email protected]>
Reviewed-by: Eric Engestrom <[email protected]>
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Signed-off-by: Dave Airlie <[email protected]>
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If the user created a fence with VK_FENCE_CREATE_SIGNALED_BIT set, we
shouldn't fail to wait for a fence if it was not submitted since that is
not necessary.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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This squashes all the radv development up until now into
one for merging.
History can be found:
https://github.com/airlied/mesa/tree/semi-interesting
This requires llvm 3.9 and is in no way considered
a conformant vulkan implementation. It can run a number
of vulkan applications, and supports all GPUs using
the amdgpu kernel driver.
Thanks to Intel for providing anv and spirv->nir,
and Emil Velikov for reviewing build integration.
Parts of this are:
Reviewed-by: Nicolai Hähnle <[email protected]>
Acked-by: Edward O'Callaghan <[email protected]>
Authors: Bas Nieuwenhuizen and Dave Airlie
Signed-off-by: Dave Airlie <[email protected]>
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Otherwise it won't be picked in the tarball and the build will fail.
Fixes: 91ec6e56649 ("radeonsi/compute: Use the HSA abi for non-TGSI
compute shaders v3")
Signed-off-by: Emil Velikov <[email protected]>
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This patch switches non-TGSI compute shaders over to using the HSA
ABI described here:
https://github.com/RadeonOpenCompute/ROCm-Docs/blob/master/AMDGPU-ABI.md
The HSA ABI provides a much cleaner interface for compute shaders and allows
us to share more code in the compiler with the HSA stack.
The main changes in this patch are:
- We now pass the scratch buffer resource into the shader via user sgprs
rather than using relocations.
- Grid/Block sizes are now passed to the shader via the dispatch packet
rather than at the beginning of the kernel arguments.
Typically for HSA, the CP firmware will create the dispatch packet and set
up the user sgprs automatically. However, in Mesa we let the driver do
this work. The main reason for this is that I haven't researched how to
get the CP to do all these things, and I'm not sure if it is supported
for all GPUs.
v2:
- Add comments explaining why we are setting certain bits of the scratch
resource descriptor.
v3:
- Use amdgcn-mesa-mesa3d triple instead of amdgcn--mesa3d.
Reviewed-by: Nicolai Hähnle <[email protected]>
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Android porting of the following commits:
f1f1ba3 "radeonsi: move sid.h/r600d_common.h to a common place."
69fca64 "amd/addrlib: move addrlib from amdgpu winsys to common code"
This patch fixes android building errors
Reviewed-by: Dave Airlie <[email protected]>
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Acked-by: Marek Olšák <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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This just moves these to a common header file.
Acked-by: Marek Olšák <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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Step one to merging radv would be to move some files around.
This only adds the include path to r600/radeonsi, because later
we want to avoid having to add it to the generic target paths.
Acked-by: Marek Olšák <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
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