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* amdgpu/addrlib: add dccRamSizeAligned output flagXavi Zhang2017-03-302-1/+7
* amdgpu/addrlib: Change comment alignmentNicolai Hähnle2017-03-301-12/+12
* amdgpu/addrlib: style changes and minor cleanupsNicolai Hähnle2017-03-3011-84/+82
* amdgpu/addrlib: AddrLib inheritance refactorNicolai Hähnle2017-03-309-560/+675
* amdgpu/addrlib: rearrange code in preparation of refactoringNicolai Hähnle2017-03-305-3528/+3595
* amdgpu/addrlib: add disableLinearOpt flagXavi Zhang2017-03-303-3/+8
* amdgpu/addrlib: Add GetMaxAlignmentsXavi Zhang2017-03-308-1/+184
* amdgpu/addrlib: Let Kaveri go general stereo right eye offset padding pathXavi Zhang2017-03-304-54/+41
* amdgpu/addrlib: Rewrite tile mode optmization codeXavi Zhang2017-03-306-27/+52
* amdgpu/addrlib: Add a flag "tcCompatible" to surface info output structure.Carlos Xiong2017-03-303-15/+50
* amdgpu/addrlib: Make comments shorterXavi Zhang2017-03-301-47/+29
* amdgpu/addrlib: add new flag nonSplitXiaoYuan Zheng2017-03-302-2/+3
* amdgpu/addrlib: allow tileSplitBytes greater than row sizeXiao-Tao Zai2017-03-301-1/+1
* amdgpu/addrlib: Change to compute TC compatible stencil infoCarlos Xiong2017-03-302-65/+59
* amdgpu/addrlib: rename SiAddrLib/CiAddrLib to match internal spellingNicolai Hähnle2017-03-304-149/+149
* radv: fix mask attribs properly.Dave Airlie2017-03-301-2/+2
* radv: fix regression with mask attrib setting code.Dave Airlie2017-03-301-3/+3
* radv: move to using nir clip/cull merge pass.Dave Airlie2017-03-302-112/+40
* radv: Enable sparseBinding feature.Bas Nieuwenhuizen2017-03-291-4/+8
* radv/amdgpu: Use reference counting for bos.Bas Nieuwenhuizen2017-03-292-0/+11
* radv: Implement sparse memory binding.Bas Nieuwenhuizen2017-03-291-4/+80
* radv: Implement sparse image creation.Bas Nieuwenhuizen2017-03-292-2/+22
* radv: Implement sparse buffer creation.Bas Nieuwenhuizen2017-03-292-2/+21
* radv/amdgpu: Add winsys implementation of virtual buffers.Bas Nieuwenhuizen2017-03-294-26/+349
* radv: Assert when setting 0 registers in a sequence.Bas Nieuwenhuizen2017-03-291-0/+4
* radv: only emit ps_input_cntl is we have any to outputDave Airlie2017-03-281-3/+6
* radv: move shader stages calculation to pipeline.Dave Airlie2017-03-283-9/+10
* radv: move pa_cl_vs_out_cntl calculation to pipelineDave Airlie2017-03-283-17/+32
* radv: move calculating fragment shader i/os to pipeline.Dave Airlie2017-03-283-63/+77
* radv: move shader_z_format calculation to pipeline.Dave Airlie2017-03-283-4/+8
* radv: move db_shader_control calculation to pipeline.Dave Airlie2017-03-283-16/+20
* radv: move vgt_gs_mode value to pipeline.Dave Airlie2017-03-283-27/+30
* radv: add parameter to emit_waitcnt.Dave Airlie2017-03-281-3/+8
* radv: rework vertex/export shader output handlingDave Airlie2017-03-284-70/+86
* radv: fix ia_multi_vgt_param for instanced vs indirect draw.Dave Airlie2017-03-283-13/+15
* radv: handle NULL multisample state.Dave Airlie2017-03-281-8/+12
* radv: flush DB cache before and after HTILE decompress.Bas Nieuwenhuizen2017-03-281-0/+6
* radv: don't emit no color formats. (v3)Dave Airlie2017-03-281-2/+19
* radv: Invalidate L2 for TRANSFER_WRITE barriersAlex Smith2017-03-231-1/+1
* radv: consistently use ifndef guards over pragma onceEmil Velikov2017-03-221-1/+4
* ac: consistently use ifndef guards over pragma onceEmil Velikov2017-03-223-3/+12
* ac: fix build with LLVM 5.0svnMarek Olšák2017-03-221-2/+8
* radv: move KHR_get_physical_device_properties2 to instance props.Dave Airlie2017-03-211-4/+4
* radv: drop illegal DB format error.Dave Airlie2017-03-211-3/+0
* radv: fix logic for when to flush on multiple CS emissionDave Airlie2017-03-201-8/+8
* radv/meta: fix image clears for r4g4 format.Dave Airlie2017-03-201-0/+8
* Revert "radv: fallback to an in-memory cache when no pipline cache is provided"Dave Airlie2017-03-203-13/+6
* radv: fix primitive reset index emissionDave Airlie2017-03-201-1/+1
* radv/ac: Fix shared memory offset calculationAlex Smith2017-03-171-1/+1
* radv: Fix using more than 4 bound descriptor setsJames Legg2017-03-171-1/+3
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