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* radv: partially enable VK_KHR_shader_float16_int8Samuel Pitoiset2019-04-013-0/+10
| | | | | | | Only 8-bit integers for now, float16 requires a bit more work. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: add 8-bit and 64-bit support to ac_build_bitfield_reverse()Samuel Pitoiset2019-04-011-0/+14
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: add 8-bit support to ac_build_umsb()Samuel Pitoiset2019-04-011-1/+7
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: add 8-bit support to ac_find_lsb()Samuel Pitoiset2019-04-011-1/+6
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: add 8-bit support to ac_build_bit_count()Samuel Pitoiset2019-04-011-0/+7
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: add support for nir_op_b2i8Samuel Pitoiset2019-04-011-0/+3
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: lower 16-bit flrpRhys Perry2019-04-011-0/+1
| | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* ac: fix ac_build_umsb() for 16-bit integer typeSamuel Pitoiset2019-04-011-1/+6
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: fix ac_find_lsb() for 16-bit integer typeSamuel Pitoiset2019-04-011-0/+2
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: fix ac_build_bitfield_reverse() for 16-bit integer typeSamuel Pitoiset2019-04-011-0/+2
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: fix ac_build_bit_count() for 16-bit integer typeSamuel Pitoiset2019-04-011-0/+2
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: fix nir_op_b2i16Samuel Pitoiset2019-04-011-3/+9
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* Revert "ac/nir: use new LLVM 8 intrinsics for SSBO atomic operations"Timothy Arceri2019-03-291-42/+24
| | | | | | | | | This reverts commit 29132af2347ede46a6d02422295a5fadbe5fe788. It seems the new intrinsic causes a hang on radeonsi (VEGA) when running the piglit test: tests/spec/arb_shader_storage_buffer_object/execution/ssbo-atomicCompSwap-int.shader_test
* ac: fix return type for llvm.amdgcn.frexp.exp.i32.64Samuel Pitoiset2019-03-291-1/+1
| | | | | | | | This fixes the following piglit with RadeonSI tests/spec/arb_gpu_shader_fp64/execution/built-in-functions/fs-frexp-dvec4.shader_test Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* radv: do not always initialize HTILE in compressed stateSamuel Pitoiset2019-03-291-2/+8
| | | | | | | | | | | | Especially when performing a transtion from UNDEFINED->GENERAL, the driver shouldn't initialize HTILE metadata in compressed state because it doesn't decompress when the src layout is GENERAL. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110259 Fixes: 3a2e93147f7 ("radv: always initialize HTILE when the src layout is UNDEFINED") Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: skip updating depth/color metadata for conditional renderingSamuel Pitoiset2019-03-281-3/+3
| | | | | | | | | | | | I don't think we should update metadata when conditional rendering is enabled. For some reasons, some CTS breaks only on SI. This fixes the following CTS on SI: dEQP-VK.conditional_rendering.draw_clear.clear.depth.* Cc: 19.0 <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: enable VK_AMD_gpu_shader_int16Samuel Pitoiset2019-03-281-0/+1
| | | | | | | This extension allows 16-bit support to Frexp/FrexpStruct. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: do not lower frexp_exp and frexp_sigSamuel Pitoiset2019-03-281-1/+0
| | | | | | | Hardware has two instructions. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: add ac_build_frex_exp() helper ans 16-bit/32-bit supportSamuel Pitoiset2019-03-283-3/+33
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: add ac_build_frexp_mant() helper and 16-bit/32-bit supportSamuel Pitoiset2019-03-283-2/+31
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* Revert "anv/radv: release memory allocated by glsl types during spirv_to_nir"Jason Ekstrand2019-03-271-2/+0
| | | | | | | | This reverts commit 4e1bbb000cdfe4ba01bee5a6868c54fed7285dae. It turns out that some DXVK apps due to some implementation detail of DXVK or other create and destroy instances in an interleaved way. Freeing the glsl_type memory without being a bit more careful causes use-after-free issues. Looks like we need to try again.
* ac: use llvm.amdgcn.fmed3 intrinsic for nir_op_fmed3Samuel Pitoiset2019-03-273-8/+36
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/surface: provide firstMipIdInTail for metadata surface calculationsNicolai Hähnle2019-03-261-0/+2
| | | | | | | | This field was added in a recent addrlib update, and while there currently seems to be no issue with skipping it, we will have to set it correctly in the future. Reviewed-by: Marek Olšák <[email protected]>
* ac/nir: Return frag_coord as integer.Bas Nieuwenhuizen2019-03-261-1/+2
| | | | | | | | | To preserve the invariant that nir ssa defs are integers or pointers in LLVM. CC: <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: write availability status vkGetQueryPoolResults() when the data is not ↵Samuel Iglesias Gonsálvez2019-03-251-15/+4
| | | | | | | | | | | | | | | | | | | | | available If VK_QUERY_RESULT_WITH_AVAILABILY_BIT is set and VK_QUERY_RESULT_WAIT_BIT and VK_QUERY_RESULT_PARTIAL_BIT are both not set, we need return to VK_NOT_READY only and set the availability status field for each query. From Vulkan spec: "If VK_QUERY_RESULT_WAIT_BIT and VK_QUERY_RESULT_PARTIAL_BIT are both not set then no result values are written to pData for queries that are in the unavailable state at the time of the call, and vkGetQueryPoolResults returns VK_NOT_READY. However, availability state is still written to pData for those queries if VK_QUERY_RESULT_WITH_AVAILABILITY_BIT is set." Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: don't overwrite results in VkGetQueryPoolResults() when queries are ↵Samuel Iglesias Gonsálvez2019-03-251-16/+32
| | | | | | | | | | | | | | | | | | | | | | | not available If the query is not available and VK_QUERY_RESULT_WAIT_BIT and VK_QUERY_RESULT_PARTIAL_BIT are both not set, the spec doesn't allow to modify its result. From Vulkan spec: "If VK_QUERY_RESULT_WAIT_BIT and VK_QUERY_RESULT_PARTIAL_BIT are both not set then no result values are written to pData for queries that are in the unavailable state at the time of the call, and vkGetQueryPoolResults returns VK_NOT_READY. However, availability state is still written to pData for those queries if VK_QUERY_RESULT_WITH_AVAILABILITY_BIT is set." v2: - Move VK_NOT_READY change to next patch (Samuel Pitoiset) Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* spirv,nir: lower frexp_exp/frexp_sig inside a new NIR passSamuel Pitoiset2019-03-221-0/+1
| | | | | | | | | | This lowering isn't needed for RADV because AMDGCN has two instructions. It will be disabled for RADV in an upcoming series. While we are at it, factorize a little bit. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* ac/nir: implement 16-bit pack/unpack opcodesRhys Perry2019-03-221-0/+24
| | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Fix driverUUIDJózef Kucia2019-03-221-1/+1
| | | | | | Fixes: 14cad8786a8 ("radv: generate the same driver UUID as radeonsi") Reviewed-by: Emil Velikov <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* ac: fix incorrect argument type for tbuffer.{load,store} with LLVM 7Samuel Pitoiset2019-03-211-4/+4
| | | | | | | | | | | GLC/SLC are boolean. This fixes the following LLVM error when checkir is set: Intrinsic has incorrect argument type! void (i32, <4 x i32>, i32, i32, i32, i32, i32, i32, i32, i32)* @llvm.amdgcn.tbuffer.store.i32 Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]
* ac: fix 16-bit shiftsSamuel Pitoiset2019-03-211-12/+21
| | | | | | | | This fixes the following LLVM error when ckeckir is set: Type too small for ZExt Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]
* ac: add 16-bit support to fractSamuel Pitoiset2019-03-211-1/+4
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: add 16-bit support fo fsignSamuel Pitoiset2019-03-211-1/+5
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: add f16_0 and f16_1 constantsSamuel Pitoiset2019-03-212-0/+4
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add missing initializations since VK_EXT_pipeline_creation_feedbackSamuel Pitoiset2019-03-211-2/+2
| | | | | | | | This fixes the world. Fixes: 5f5ac19f138 ("radv: Implement VK_EXT_pipeline_creation_feedback.")" Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: enable VK_KHR_8bit_storageRhys Perry2019-03-213-0/+11
| | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: implement 8-bit conversionsRhys Perry2019-03-211-0/+4
| | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: add 8-bit types to glsl_base_to_llvm_typeRhys Perry2019-03-211-0/+3
| | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: implement 8-bit ssbo storesRhys Perry2019-03-211-2/+7
| | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: add ac_build_tbuffer_store_byte() helperSamuel Pitoiset2019-03-212-0/+28
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: implement 8-bit push constant, ssbo and ubo loadsRhys Perry2019-03-211-10/+55
| | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: add ac_build_tbuffer_load_byte() helperSamuel Pitoiset2019-03-212-0/+26
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: add various int8 definitionsSamuel Pitoiset2019-03-212-2/+10
| | | | | | | Original patch by Rhys Perry. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* anv/radv: release memory allocated by glsl types during spirv_to_nirTapani Pälli2019-03-211-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | Fixes leaks for each glsl_type generated: ==32470== 384 bytes in 3 blocks are possibly lost in loss record 18 of 18 ==32470== at 0x483880B: malloc (vg_replace_malloc.c:309) ==32470== by 0x4C43F4A: ralloc_size (ralloc.c:119) ==32470== by 0x4C44014: rzalloc_size (ralloc.c:151) ==32470== by 0x4C44258: rzalloc_array_size (ralloc.c:215) ==32470== by 0x4D38957: glsl_type::glsl_type(glsl_struct_field const*, unsigned int, char const*) (glsl_types.cpp:114) ==32470== by 0x4D3BEED: glsl_type::get_struct_instance(glsl_struct_field const*, unsigned int, char const*) (glsl_types.cpp:1146) ==32470== by 0x4D42ECC: glsl_struct_type (nir_types.cpp:501) ==32470== by 0x4CDB5A1: vtn_handle_type (spirv_to_nir.c:1269) ==32470== by 0x4CE53DD: vtn_handle_variable_or_type_instruction (spirv_to_nir.c:4018) ==32470== by 0x4CD8CFF: vtn_foreach_instruction (spirv_to_nir.c:365) ==32470== by 0x4CE5E6B: spirv_to_nir (spirv_to_nir.c:4490) ==32470== by 0x497AF10: anv_shader_compile_to_nir (anv_pipeline.c:173) v2: move release call to vkDestroyInstance v3: apply fix also to radv driver Signed-off-by: Tapani Pälli <[email protected]> Cc: [email protected] Reviewed-by: Jason Ekstrand <[email protected]>
* anv,radv,turnip: Lower TG4 offsets with nir_lower_texJason Ekstrand2019-03-211-0/+1
| | | | | | v2: turn on for turnip as well (Karol Herbst) Reviewed-by: Karol Herbst <[email protected]>
* radv: Implement VK_EXT_pipeline_creation_feedback.Bas Nieuwenhuizen2019-03-205-9/+107
| | | | | | | | | Does what it says on the tin. The per stage time is only an approximation due to linking and the Vega merged stages. Reviewed-by: Samuel Pitoiset <[email protected]>
* ac: use new LLVM 8 intrinsics in ac_build_buffer_store_dword()Samuel Pitoiset2019-03-201-40/+26
| | | | | | | New buffer intrinsics have a separate soffset parameter. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: use new LLVM 8 intrinsic when storing 16-bit valuesSamuel Pitoiset2019-03-203-21/+33
| | | | | | | vindex is always 0. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: add ac_build_{struct,raw}_tbuffer_store() helpersSamuel Pitoiset2019-03-202-0/+156
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: use new LLVM 8 intrinsics in ac_build_buffer_load()Samuel Pitoiset2019-03-201-0/+8
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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