summaryrefslogtreecommitdiffstats
path: root/src/amd
Commit message (Expand)AuthorAgeFilesLines
* radv: use ac_compute_surfaceNicolai Hähnle2017-06-051-386/+6
* radv: prepare fmask surface creationDave Airlie2017-06-052-7/+7
* radv: use amdgpu_addr_createNicolai Hähnle2017-06-054-158/+5
* radv: stop using radv_amdgpu_winsys::familyNicolai Hähnle2017-06-052-2/+2
* radv: use ac_gpu_infoNicolai Hähnle2017-06-055-229/+13
* radv: remove radeon_info::nameNicolai Hähnle2017-06-053-30/+27
* radv: use ac_surface data structuresNicolai Hähnle2017-06-058-153/+81
* radv: rename radeon_surf::bo_{size,alignment} to surf_{size,alignment}Nicolai Hähnle2017-06-053-12/+13
* radv: remove unused RADEON_SURF_HAS_SBUFFER_MIPTREENicolai Hähnle2017-06-052-3/+1
* radv: remove radeon_surf_level::nblk_zNicolai Hähnle2017-06-053-6/+1
* radv: remove radeon_surf_level::dcc_enabledNicolai Hähnle2017-06-055-6/+7
* radv: remove radeon_surf_level::pitch_bytesNicolai Hähnle2017-06-055-13/+3
* radv: add surface helper variable in radv_GetImageSubresourceLayoutNicolai Hähnle2017-06-051-6/+7
* radv: fewer than 8 RBs are possibleNicolai Hähnle2017-06-051-2/+0
* ac/surface/gfx6: explicitly support S8 surfacesNicolai Hähnle2017-06-051-25/+50
* ac/nir: set workgroup size attribute to correct value.Dave Airlie2017-06-051-3/+32
* ac: add new helper function to add a integer target dependent function attr.Dave Airlie2017-06-052-0/+15
* radv: add external memory support.Dave Airlie2017-06-053-14/+183
* radv: Add VkPhysicalDeviceIDProperties support.Bas Nieuwenhuizen2017-06-052-2/+23
* radv: Add support for external queue family.Bas Nieuwenhuizen2017-06-051-1/+6
* radv/formats: reverse how the image format properties KHR2 is handledDave Airlie2017-06-051-30/+46
* radv: Dirty all descriptors sets when changing the pipeline.Bas Nieuwenhuizen2017-06-032-8/+14
* radv: Set both compute and graphics SGPRS on descriptor set flush.Bas Nieuwenhuizen2017-06-031-50/+50
* radv: realign cp dma code with radeonsiDave Airlie2017-06-021-86/+70
* radv: bump some base addresses to 64-bits.Dave Airlie2017-06-021-9/+9
* radv: factor out eop event writing code. (v2)Dave Airlie2017-06-024-65/+82
* radv: factor out si_emit_wait_fence code.Dave Airlie2017-06-024-22/+20
* radv: Revert HTILE reset word to 0xFFFFFFFF.Bas Nieuwenhuizen2017-05-311-1/+1
* radv: Reserve space for descriptor and push constant user SGPR setting.Bas Nieuwenhuizen2017-05-291-0/+8
* amd/common: set vcn dec as hw decode as wellLeo Liu2017-05-291-0/+2
* amd/common: add vcn dec ip info query for amdgpu version 3.17Leo Liu2017-05-291-1/+9
* radv: automake: list shared libraries after the static onesEmil Velikov2017-05-291-19/+16
* radeonsi: move building llvm.SI.load.const into ac_build_buffer_loadMarek Olšák2017-05-293-14/+37
* radeonsi: rename readonly_memory -> can_speculateMarek Olšák2017-05-292-6/+6
* radv: Also signal fence if vkAcquireNextImageKHR returns VK_SUBOPTIMAL_KHR.Bas Nieuwenhuizen2017-05-291-1/+1
* amd/common: add missing libdrm include pathEric Engestrom2017-05-261-0/+1
* Revert "amd/common: add vcn dec ip info query"Dave Airlie2017-05-261-7/+1
* Revert "amd/common: set vcn dec as hw decode as well"Dave Airlie2017-05-261-2/+0
* amd/common: set vcn dec as hw decode as wellLeo Liu2017-05-251-0/+2
* amd/common: add vcn dec ip info queryLeo Liu2017-05-251-1/+7
* radeon: rename has_uvd info to has_hw_decodeLeo Liu2017-05-252-2/+2
* winsys/amdgpu: align VA allocations to fragment size v2Christian König2017-05-242-0/+2
* radv: Add compute HTILE fast clear.Bas Nieuwenhuizen2017-05-221-1/+93
* radv: Use correct clear words for HTILE.Bas Nieuwenhuizen2017-05-221-4/+13
* radv: Add queue masks for htile usage determination.Bas Nieuwenhuizen2017-05-224-20/+41
* radv: Specify semantics of HTILE layout helpers.Bas Nieuwenhuizen2017-05-223-3/+20
* radv: Don't use a separate can_expclear.Bas Nieuwenhuizen2017-05-225-40/+11
* configure: check once for DRI3 dependenciesEmil Velikov2017-05-191-2/+1
* ac: add missing extern "C" guardsNicolai Hähnle2017-05-182-0/+16
* ac: add radeon_info::num_{sdma,compute}_ringsNicolai Hähnle2017-05-182-3/+15