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* amd/common: add missing libdrm include pathEric Engestrom2017-05-261-0/+1
| | | | | | Fixes: de9dd4f9f1bb5984c554 ("ac/radeonsi: move struct radeon_info to ac_gpu_info.h") Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Eric Engestrom <[email protected]>
* Revert "amd/common: add vcn dec ip info query"Dave Airlie2017-05-261-7/+1
| | | | | | | | This reverts commit 524d4fff9e0e58e812e71bc5ba2c92ffa73bee16. This commit breaks amdgpu on kernels with no DEC IP support. Caught by the airlied CI system.
* Revert "amd/common: set vcn dec as hw decode as well"Dave Airlie2017-05-261-2/+0
| | | | | | | This reverts commit 50d322be2f30bb935ee52b3b3649785975771110. A previous patch breaks amdgpu on non-vcn decode systems, but have to revert this first.
* amd/common: set vcn dec as hw decode as wellLeo Liu2017-05-251-0/+2
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* amd/common: add vcn dec ip info queryLeo Liu2017-05-251-1/+7
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon: rename has_uvd info to has_hw_decodeLeo Liu2017-05-252-2/+2
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* winsys/amdgpu: align VA allocations to fragment size v2Christian König2017-05-242-0/+2
| | | | | | | | | | BOs larger than the minimum fragment size should have their VA alignet to at least the fragment size for optimal performance. v2: drop unused leftover from initial implementation Signed-off-by: Christian König <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radv: Add compute HTILE fast clear.Bas Nieuwenhuizen2017-05-221-1/+93
| | | | | | | | | Not really what the fast depth clear does, no matter whether you use EXPCLEAR or not. Seems the fast clear using the DB HW always touches the main buffer. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Use correct clear words for HTILE.Bas Nieuwenhuizen2017-05-221-4/+13
| | | | | | | | | | Did some RE'ing what several HTILE words give when read from a descriptor with HTILE compression enabled. Seems to align with -pro usage for D16 too. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Add queue masks for htile usage determination.Bas Nieuwenhuizen2017-05-224-20/+41
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Specify semantics of HTILE layout helpers.Bas Nieuwenhuizen2017-05-223-3/+20
| | | | | | | And correct implementation to specify only what we support. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Don't use a separate can_expclear.Bas Nieuwenhuizen2017-05-225-40/+11
| | | | | | | We never use EXPCLEAR clears. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* configure: check once for DRI3 dependenciesEmil Velikov2017-05-191-2/+1
| | | | | | | | | | | | | | | | Currently we are having the XCB_DRI3 dependencies duplicated, partially. Just do a once-off check and add all of the respective CFLAGS/LIBS where needed. As a nice side effect this helps us solve a couple of FIXMEs. DRI3 is not a thing w/o X11 so disable it in such cases. Cc: [email protected] Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* ac: add missing extern "C" guardsNicolai Hähnle2017-05-182-0/+16
| | | | Reviewed-by: Marek Olšák <[email protected]>
* ac: add radeon_info::num_{sdma,compute}_ringsNicolai Hähnle2017-05-182-3/+15
| | | | | | Vulkan needs them. Reviewed-by: Marek Olšák <[email protected]>
* ac: add radeon_surf::htile_slice_sizeNicolai Hähnle2017-05-182-0/+6
| | | | | | Vulkan needs it. Reviewed-by: Marek Olšák <[email protected]>
* ac_surface: use radeon_info from ac_gpu_infoNicolai Hähnle2017-05-182-29/+29
| | | | Reviewed-by: Marek Olšák <[email protected]>
* ac/radeonsi: move radeon_info initialization to amd/commonNicolai Hähnle2017-05-185-3/+289
| | | | | | v2: update Android.common.mk (Emil) Reviewed-by: Marek Olšák <[email protected]>
* ac/radeonsi: move struct radeon_info to ac_gpu_info.hNicolai Hähnle2017-05-181-0/+93
| | | | Reviewed-by: Marek Olšák <[email protected]>
* ac/radeonsi: move some aspects of sanity checking to ac_surfaceNicolai Hähnle2017-05-181-0/+33
| | | | Reviewed-by: Marek Olšák <[email protected]>
* ac/radeonsi: add ac_compute_surface to automatically switch gfx6 vs. gfx9Nicolai Hähnle2017-05-182-16/+23
| | | | Reviewed-by: Marek Olšák <[email protected]>
* ac/radeonsi: move the bulk of gfx9_surface_init to ac_surfaceNicolai Hähnle2017-05-182-0/+384
| | | | | | We can now merge the two *_surface_init functions. Reviewed-by: Marek Olšák <[email protected]>
* ac/radeonsi: move the bulk of gfx6_surface_init to ac_surfaceNicolai Hähnle2017-05-182-0/+454
| | | | Reviewed-by: Marek Olšák <[email protected]>
* ac/radeonsi: move amdgpu_addr_create to ac_surfaceNicolai Hähnle2017-05-185-0/+219
| | | | | | | | v2: - update Android.common.mk (Emil) - rebase on top of Raven support Reviewed-by: Marek Olšák <[email protected]> (v1)
* ac/radeonsi: move surface definitions to new header ac_surface.hNicolai Hähnle2017-05-181-0/+178
| | | | Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: use a top-of-pipe timestamp for the start of TIME_ELAPSEDMarek Olšák2017-05-171-0/+11
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/debug: handle index field in SET_*_REG correctlyNicolai Hähnle2017-05-161-1/+7
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/gfx9: add support for RavenMarek Olšák2017-05-151-0/+1
| | | | | | Cc: 17.1 <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* amd/addrlib: import Raven supportMarek Olšák2017-05-153-3/+72
| | | | | | Cc: 17.1 <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radv: Save descriptor set even if vertex buffers are not saved.Bas Nieuwenhuizen2017-05-131-2/+3
| | | | | | | | Totally independent. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Fixes: 0e6d532d327 "radv/meta: add support for save/restore meta without vertex data."
* radeon: automake: remove unneeded elf Cflags/LibsEmil Velikov2017-05-111-0/+2
| | | | | | | | | | | | No longer required as of commit d90bf4ef3e1 ("radeon: remove unused radeon_elf_util.{c,h}") v2: Add the required libelf link in src/amd/Makefile.common.am Fixes: d90bf4ef3e1 ("radeon: remove unused radeon_elf_util.{c,h}") Cc: Timothy Arceri <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Marek Olšák <[email protected]> (v1)
* Android: rework LLVM build supportRob Herring2017-05-111-1/+2
| | | | | | | | | | | | | Currently, building with "mmma external/mesa3d" which builds all targets and dependencies is broken for targets that require LLVM. This is due to the build settings depending on MESA_ENABLE_LLVM. Instead of using a conditional in the global Android.common.mk, make all the components that need LLVM explicitly include the necessary build settings. GALLIVM_CPP_SOURCES doesn't exist anymore, so remove that as well. Signed-off-by: Rob Herring <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* Android: rework libelf dependenciesRob Herring2017-05-111-2/+4
| | | | | | | | | Add libelf as a library dependency rather than explicitly listing its include paths. This should work for Android M and later which have the necessary exported directories in libelf. Signed-off-by: Rob Herring <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* Android: amd/common: fix dependency on libmesa_nirRob Herring2017-05-111-1/+3
| | | | | | | | | | | | | | | | | | Building libmesa_amd_common fails with: external/mesa/src/amd/common/ac_shader_info.c:23:10: fatal error: 'nir/nir.h' file not found ^ external/mesa/src/compiler/nir/nir.h:48:10: fatal error: 'nir_opcodes.h' file not found ^ libmesa_amd_common now depends on libmesa_nir, so add it as a dependency and export the necessary directories. Fixes: 224cf29 "radv/ac: add initial pre-pass for shader info gathering" Signed-off-by: Rob Herring <[email protected]> Reviewed-by: Chih-Wei Huang <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* Android: amd: use exported include dirs instead of explicit includesRob Herring2017-05-112-0/+9
| | | | | | | | | Add exported include paths rather than explicitly adding the includes in each user of the common AMD libs. Signed-off-by: Rob Herring <[email protected]> Reviewed-by: Chih-Wei Huang <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* Android: remove remaining explicit libcxx includesRob Herring2017-05-111-1/+0
| | | | | | | | | | | Explicitly including libcxx includes is not necessary at least on Android M and later. It appears that libc++ was made the default in commit "Make libc++ the default STL." in Android build system post L. However, if L support is still needed, using "LOCAL_CXX_STL=libc++" is the preferred way. Signed-off-by: Rob Herring <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* radv: handle fragment shader srgb resolve pass betterDave Airlie2017-05-112-11/+38
| | | | | | | | | | | Bas pointed out the fs key doesn't take srgb into account, since there is just one srgb variant, just create a separate pipeline for it. This also uses dest format to be more consistent on when srgb matters. Fixes: 69136f4e633 "radv/meta: add resolve pass using fragment/vertex shaders" Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: always free nir shaders from modules on stackGrazvydas Ignotas2017-05-102-8/+4
| | | | | | | | | valgrind reports them as leaked, and I could not find anything making a copy of the nir pointer. Also, radv_device_init_meta_blit_color() is already freeing them unconditionally like this. Signed-off-by: Grazvydas Ignotas <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* nir: Embed the shader_info in the nir_shader againJason Ekstrand2017-05-0912-111/+111
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit e1af20f18a86f52a9640faf2d4ff8a71b0a4fa9b changed the shader_info from being embedded into being just a pointer. The idea was that sharing the shader_info between NIR and GLSL would be easier if it were a pointer pointing to the same shader_info struct. This, however, has caused a few problems: 1) There are many things which generate NIR without GLSL. This means we have to support both NIR shaders which come from GLSL and ones that don't and need to have an info elsewhere. 2) The solution to (1) raises all sorts of ownership issues which have to be resolved with ralloc_parent checks. 3) Ever since 00620782c92100d77c660f9783504c6d80fa1d58, we've been using nir_gather_info to fill out the final shader_info. Thanks to cloning and the above ownership issues, the nir_shader::info may not point back to the gl_shader anymore and so we have to do a copy of the shader_info from NIR back to GLSL anyway. All of these issues go away if we just embed the shader_info in the nir_shader. There's a little downside of having to copy it back after calling nir_gather_info but, as explained above, we have to do that anyway. Acked-by: Timothy Arceri <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* ac: fix broken elimination of duplicated VS exportsMarek Olšák2017-05-081-14/+14
| | | | | | | | | | | | | | The renumbering code didn't take into account that multiple VS exports can have the same PARAM index. This also significantly simplifies the renumbering. Thankfully, we have piglits for this: spec@arb_gpu_shader5@arb_gpu_shader5-interpolateatcentroid-packing [email protected]@execution@interface-blocks-complex-vs-fs Reported by Michel Dänzer. Fixes: b08715499e61 ("ac: eliminate duplicated VS exports") Reviewed-by: Nicolai Hähnle <[email protected]>
* radv: fix regression in blit2d push constant change.Dave Airlie2017-05-081-1/+1
| | | | | | | | | These were being fed to the shader as floats via the vertex path, so also push them as floats here. This fixes missing overlay in Sascha Willems demos. Signed-off-by: Dave Airlie <[email protected]>
* radv/meta: cleanup some unused code pathDave Airlie2017-05-082-34/+1
| | | | | | | | After moving everything to using push constants, these paths are no longer needed. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/meta: port blit to using push constantsDave Airlie2017-05-081-100/+65
| | | | | | | Remove use of vertex buffer. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/meta: move blit2d to using push constantsDave Airlie2017-05-082-75/+59
| | | | | | | This allows us to drop the vertex buffer. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/meta: move clear color to using push constantsDave Airlie2017-05-082-130/+78
| | | | | | | | | | | | The color clear value is uniform and needs only to be emitted from the frag shader, so just push it down via a push constant, and remove the vertex buffer completely. The depth clear value needs to be emitted from the vertex shader, but is only a single value. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/meta: use novertex save path for resolve pass.Dave Airlie2017-05-082-2/+2
| | | | | | | This was missing in the original change. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: set base/ranges for push constant loads.Dave Airlie2017-05-086-0/+26
| | | | | | | | | This isn't necessary yet but I'd like to use the range in some future patches. [airlied: add new resolve pass] Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: drop resolve hack workaroundsDave Airlie2017-05-073-104/+1
| | | | | | | | | This drops the resolve workarounds that change an image tiling mode behinds it's back, this is horrible and breaks the image_view->image relationship. Remove all this. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/meta: select resolve pathsDave Airlie2017-05-071-8/+50
| | | | | | | | | | | | | | | | There are 3 resolve paths, the fastest being the hw resolver but it has restriction on tile modes and can't do subresolves, the compute resolver is next speed wise, but can't handle DCC destinations, the fragment resolver handles that case. This will end up with a slow down as currently we hack the hw resolver paths when they shouldn't work, but we shouldn't keep doing that. The next patch removes the hacks. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/meta: add resolve pass using fragment/vertex shadersDave Airlie2017-05-076-2/+699
| | | | | | | | | | | In order to resolve into DCC enabled dests we need to use the fragment shader. This reuses the code from the compute path and implements a resolve path in vertex/fragment shader. This code isn't used until later. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
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