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* radv: use a 64-bit unsigned integer when allocating a descriptor poolSamuel Pitoiset2018-09-191-1/+1
* radv: enable VK_SUBGROUP_FEATURE_ARITHMETIC_BITSamuel Pitoiset2018-09-192-0/+2
* radv: do not support blitting surfaces with depth and stencilSamuel Pitoiset2018-09-191-0/+4
* Revert "radv: fix descriptor pool allocation size"Bas Nieuwenhuizen2018-09-181-2/+1
* radv: implement VK_EXT_conservative_rasterizationSamuel Pitoiset2018-09-183-1/+63
* radv: do not re-create the sampler for every blits in CmdBlitImage()Samuel Pitoiset2018-09-181-15/+17
* radv: allow to force anisotropy via RADV_TEX_ANISOSamuel Pitoiset2018-09-182-2/+47
* radv: Use build ID if available for cache UUID.Bas Nieuwenhuizen2018-09-171-8/+35
* radv: enable shaderInt16 capabilitySamuel Pitoiset2018-09-172-1/+2
* ac: add 16-bit support to ac_build_bitfield_reverse()Samuel Pitoiset2018-09-171-0/+5
* ac: add 16-bit support to ac_build_bit_count()Samuel Pitoiset2018-09-171-0/+5
* ac: add 16-bit support to ac_find_lsb()Samuel Pitoiset2018-09-171-2/+13
* ac: add 16-bit support to ac_build_umsb()Samuel Pitoiset2018-09-171-2/+16
* ac: add 16-bit support to ac_build_isign()Samuel Pitoiset2018-09-171-5/+16
* ac: add 16-bit constant values for zero and oneSamuel Pitoiset2018-09-172-0/+4
* ac: add ac_build_bifield_reverse() helperSamuel Pitoiset2018-09-173-1/+26
* ac: add ac_build_bit_count() helperSamuel Pitoiset2018-09-173-6/+31
* radv: fix use of unreachable() in the meta blit pathSamuel Pitoiset2018-09-171-4/+4
* Revert "radv: Optimize rebinding the same descriptor set."Samuel Pitoiset2018-09-171-7/+1
* radv: fix descriptor pool allocation sizeSamuel Pitoiset2018-09-171-1/+2
* radv: Only allow 16 user SGPRs for compute on GFX9+.Bas Nieuwenhuizen2018-09-161-1/+1
* radv: Set the user SGPR MSB for Vega.Bas Nieuwenhuizen2018-09-161-0/+1
* radv: Optimize rebinding the same descriptor set.Bas Nieuwenhuizen2018-09-161-1/+7
* ac: fix get_image_coords() for radeonsiTimothy Arceri2018-09-151-1/+2
* radv: emit the initial config only once in the preamblesSamuel Pitoiset2018-09-144-50/+48
* radv: fix setting global locations for indirect descriptorsSamuel Pitoiset2018-09-141-1/+0
* radv: fix flushing indirect descriptorsSamuel Pitoiset2018-09-141-3/+9
* radv: fix GPU hangs with 32-bit indirect descriptorsSamuel Pitoiset2018-09-141-3/+5
* radv: handle loc->indirect correctly for the first descriptorSamuel Pitoiset2018-09-142-11/+10
* radv: bump the maximum number of arguments to 64Samuel Pitoiset2018-09-141-1/+1
* radv: tidy up ac_setup_rings() for the GSVS ringsSamuel Pitoiset2018-09-141-13/+34
* radv: fix setting the number of entries for GSVS on VI+Samuel Pitoiset2018-09-141-3/+0
* radv: always compute the number of components from the output maskSamuel Pitoiset2018-09-141-12/+2
* radv: emit data contiguously in the GS->VS ring bufferSamuel Pitoiset2018-09-141-16/+12
* radv: make use of the output usage mask in GS copy shaderSamuel Pitoiset2018-09-141-0/+3
* radv: improve a comment in si_emit_set_predication_state()Samuel Pitoiset2018-09-141-8/+6
* radv: fix VK_EXT_conditional_rendering visibilitySamuel Pitoiset2018-09-141-4/+12
* radv: make use of ac_unpack_param() instead of ac_build_bfe()Samuel Pitoiset2018-09-141-15/+6
* radv: fix function names for VK_EXT_conditional_renderingSamuel Pitoiset2018-09-131-2/+2
* radv: adjust ESGS ring buffer size computation on VI+Samuel Pitoiset2018-09-111-1/+5
* radv: Support v3 of VK_EXT_vertex_attribute_divisor.Bas Nieuwenhuizen2018-09-102-1/+8
* radeonsi: adjust and simplify max_alloc_size determinationMarek Olšák2018-09-101-8/+8
* radeonsi: fix GPU hangs with bindless textures and LLVM 7.0Marek Olšák2018-09-102-5/+51
* ac: remove deprecated use of LLVMInt1Type()Marek Olšák2018-09-101-1/+1
* ac: use iN_0/1 constantsMarek Olšák2018-09-102-14/+13
* ac: add radeon_info::num_good_cu_per_shMarek Olšák2018-09-102-0/+4
* ac: revert new LLVM 7.0 behavior for fdivMarek Olšák2018-09-101-1/+8
* nir: Drop the vs_inputs_dual_locations optionJason Ekstrand2018-09-061-1/+0
* radv: Fix CMASK dimensions.Bas Nieuwenhuizen2018-09-031-2/+2
* radv: Use a lower max offchip buffer count.Bas Nieuwenhuizen2018-09-031-2/+22
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