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* radv: Also set DCC params for sampling for input attachment usage.Bas Nieuwenhuizen2017-12-291-1/+2
* radv: Enable DCC with transfers.Bas Nieuwenhuizen2017-12-291-2/+1
* radv: Decompress copy destination if formats are incompatible.Bas Nieuwenhuizen2017-12-291-2/+25
* radv: Disable DCC for GENERAL layout and compute transfer dest.Bas Nieuwenhuizen2017-12-294-8/+47
* radv: Don't init DCC metadata during FS resolve.Bas Nieuwenhuizen2017-12-291-5/+0
* radv: Make color meta operations layout aware.Bas Nieuwenhuizen2017-12-295-110/+145
* radv: Add compute DCC decompress.Bas Nieuwenhuizen2017-12-293-0/+275
* radv: Use the meta fast clear destructor on construction failure.Bas Nieuwenhuizen2017-12-291-6/+3
* radv: Add GFX DCC decompress.Bas Nieuwenhuizen2017-12-292-12/+83
* radv: Don't enable DCC / TC compat HTILE for storage images.Bas Nieuwenhuizen2017-12-291-5/+6
* Revert "radv/gfx9: fix block compression texture views."Bas Nieuwenhuizen2017-12-291-35/+0
* radv/gfx9: use correct swizzle parameter to work out border swizzle.Dave Airlie2017-12-291-2/+2
* radv/gfx9: use a bigger hammer to flush cb/db caches.Dave Airlie2017-12-291-1/+8
* radv/gfx9: fix block compression texture views.Dave Airlie2017-12-291-0/+35
* radv/gfx9: fix buffer to image for 3d images on compute queuesDave Airlie2017-12-292-15/+48
* radv/gfx9: fix 3d image clears on compute queuesDave Airlie2017-12-292-9/+65
* radv/gfx9: fix 3d image to image transfers on compute queues.Dave Airlie2017-12-292-20/+56
* radv: fix pipeline statistics end query on compute queueDave Airlie2017-12-281-1/+1
* radv: fix events on compute queues.Dave Airlie2017-12-281-1/+1
* radv: move local bos usage to a perftest flag.Dave Airlie2017-12-285-1/+5
* radv: Always use fragment resolve if dest uses DCC.Bas Nieuwenhuizen2017-12-281-5/+4
* radv: Use correct framebuffer size for partial FS resolves.Bas Nieuwenhuizen2017-12-281-2/+2
* radv: Fix fragment resolve destination offset.Bas Nieuwenhuizen2017-12-281-2/+2
* radv: Don't handle DCC in compute resolve.Bas Nieuwenhuizen2017-12-281-4/+1
* radv: Flush caches before subpass resolve.Bas Nieuwenhuizen2017-12-282-0/+18
* radv: Invert condition for all samples identical during resolve.Bas Nieuwenhuizen2017-12-281-1/+1
* radv: don't do format replacement on tc compat htile surfaces.Dave Airlie2017-12-281-1/+2
* radv/gfx9: use correct stencil format for tc compat htile.Dave Airlie2017-12-281-4/+7
* amd/common: rework set_userdata_location() and rename to set_loc()Samuel Pitoiset2017-12-271-8/+11
* amd/common: rename set_userdata_location_shader() to set_loc_shader()Samuel Pitoiset2017-12-271-27/+30
* amd/common: replace set_userdata_location_indirect() by set_loc_desc()Samuel Pitoiset2017-12-271-11/+12
* amd/common: rename radv_define_vs_user_sgprs_phase2()Samuel Pitoiset2017-12-271-22/+33
* amd/common: rename radv_define_common_user_sgprs_phase2()Samuel Pitoiset2017-12-271-43/+50
* amd/common: rename add_user_sgpr_array_argument() to add_array_arg()Samuel Pitoiset2017-12-271-9/+5
* amd/common: replace add_sgpr_argument() by add_arg()Samuel Pitoiset2017-12-271-45/+33
* amd/common: replace add_user_sgpr_argument() by add_arg()Samuel Pitoiset2017-12-271-45/+58
* amd/common: replace add_vgpr_argument() by add_arg()Samuel Pitoiset2017-12-271-51/+60
* amd/common: add new add_arg() helper for SGPRs/VGPRs argumentsSamuel Pitoiset2017-12-271-0/+24
* amd/common: rename radv_define_common_user_sgprs_phase1()Samuel Pitoiset2017-12-271-38/+74
* amd/common: rename radv_define_vs_user_sgprs_phase1()Samuel Pitoiset2017-12-271-21/+42
* amd/common: do not try to declare input VS SGPRs for GSSamuel Pitoiset2017-12-271-1/+0
* amd/common: add declare_vs_input_vgprs() helperSamuel Pitoiset2017-12-271-14/+16
* amd/common: add declare_tes_input_vgprs() helperSamuel Pitoiset2017-12-271-8/+10
* amd/common: remove unnecessary num_user_sgprs_usedSamuel Pitoiset2017-12-271-2/+0
* amd/common: remove unnecessary user_sgpr_countSamuel Pitoiset2017-12-271-2/+0
* radv: set some dcc parameters depending on if texture will be sampledDave Airlie2017-12-271-1/+10
* radv/radeonsi: set dcc min uncompressed properly for APUs.Dave Airlie2017-12-271-0/+10
* amd/common/radv/radeonsi: use register defines for dcc block sizes.Dave Airlie2017-12-272-3/+9
* radv: Fix DCC compatible formats.Bas Nieuwenhuizen2017-12-231-1/+1
* amd/common: add ac_export_mrt_z() helperSamuel Pitoiset2017-12-223-59/+83
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