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* radv: update the fast ds clear values only if the image is boundSamuel Pitoiset2018-06-151-5/+32
* radv: clean up radv_{set,load}_color_clear_regs() helpersSamuel Pitoiset2018-06-153-33/+47
* radv: update the fast color clear values only if the image is boundSamuel Pitoiset2018-06-151-3/+32
* radv: remove multisample bit from shader key.Dave Airlie2018-06-153-4/+0
* radv: Fix output for sparse MRTs.Bas Nieuwenhuizen2018-06-141-9/+10
* radv: update the ZRANGE_PRECISION value for the TC-compat bugSamuel Pitoiset2018-06-141-0/+108
* ac: handle undefined EQAA samples in ac_apply_fmask_to_sampleMarek Olšák2018-06-131-2/+4
* ac/gpu_info: report real total memory sizesMarek Olšák2018-06-131-28/+54
* radv: don't fast clear HTILE for 16-bit depth surfaces on GFX8Samuel Pitoiset2018-06-131-0/+8
* radv: add a workaround for DXVK hangs by setting amdgpu-skip-thresholdSamuel Pitoiset2018-06-091-1/+78
* radv: fix missing ZRANGE_PRECISION(1) for GFX9+Samuel Pitoiset2018-06-091-1/+2
* ac: fix possible truncation of intrinsic nameTimothy Arceri2018-06-081-1/+1
* amd/common: Fix number of coords for getlod.Bas Nieuwenhuizen2018-06-071-3/+18
* radv: fix Coverity no effect control flow issueTimothy Arceri2018-06-071-1/+1
* radv: Use correct color format for fast clearsPhilip Rebohle2018-06-051-2/+2
* radv: Do not hardcode fast clear formats.Bas Nieuwenhuizen2018-06-051-180/+73
* amd/common: use the dimension-aware image intrinsics on LLVM 7+Nicolai Hähnle2018-06-041-24/+165
* radv: fix a GPU hang when MRTs are sparseSamuel Pitoiset2018-06-041-0/+10
* radv: Don't pass a TESS_EVAL shader when tesselation is not enabled.Bas Nieuwenhuizen2018-06-041-0/+2
* radv: Handle GFX9 merged shaders in radv_flush_constants()Alex Smith2018-06-011-1/+8
* radv: Consolidate GFX9 merged shader lookup logicAlex Smith2018-06-013-35/+26
* radv: Set active_stages the same whether or not shaders were cachedAlex Smith2018-06-011-5/+2
* radv: Add startup debug option.Bas Nieuwenhuizen2018-05-314-2/+50
* radv: Add option to print errors even in optimized builds.Bas Nieuwenhuizen2018-05-3114-96/+108
* radv: Make the sem_info allocate/free functions static.Bas Nieuwenhuizen2018-05-312-15/+9
* radv: Only expose subgroup shuffles on VI+.Bas Nieuwenhuizen2018-05-301-2/+5
* radv: fix emitting descriptor pointers with LLVM < 7Samuel Pitoiset2018-05-301-2/+4
* radv: emit shader descriptor pointers consecutivelySamuel Pitoiset2018-05-291-47/+57
* radv: allow radv_emit_shader_pointer_head() to emit more pointersSamuel Pitoiset2018-05-291-3/+5
* radv: split radv_emit_shader_pointer()Samuel Pitoiset2018-05-291-5/+20
* radv: Implement VK_KHR_draw_indirect_count.Bas Nieuwenhuizen2018-05-282-0/+50
* radv: Implement alternate GFX9 scissor workaround.Bas Nieuwenhuizen2018-05-281-33/+47
* radv: run the EarlyCSEMemSSA LLVM passSamuel Pitoiset2018-05-251-0/+2
* radv: fix dumping compute shader on the graphics queueSamuel Pitoiset2018-05-251-5/+8
* radv: add radv_dump_pipeline_state() helperSamuel Pitoiset2018-05-251-6/+11
* radv: rework how shaders are dumped when generating a hang reportSamuel Pitoiset2018-05-251-26/+15
* radv: remove unused parameter in radv_dump_annotated_shader()Samuel Pitoiset2018-05-251-8/+6
* radeonsi: remove some old gfx 9.x registersMarek Olšák2018-05-241-48/+0
* ac/surface/gfx6: don't overallocate mipmapped HTILEMarek Olšák2018-05-241-2/+11
* radv: call nir_lower_io_to_temporaries for VS, GS, TES and FSSamuel Pitoiset2018-05-241-0/+10
* radv: call nir_split_var_copies() before nir_lower_var_copies()Samuel Pitoiset2018-05-241-0/+3
* ac: Use DPP for build_ddxy where possible.Bas Nieuwenhuizen2018-05-231-1/+15
* ac/surface/gfx6: Don't force a tile index for fmask.Bas Nieuwenhuizen2018-05-231-1/+1
* radv: fix computation of user sgprs for 32-bit pointersSamuel Pitoiset2018-05-221-1/+3
* radv: drop user_sgpr_info::sgpr_countSamuel Pitoiset2018-05-221-13/+11
* radv: add support for 32-bit pointers in user data SGPRsSamuel Pitoiset2018-05-224-21/+40
* radv: add set_loc_shader_ptr() helperSamuel Pitoiset2018-05-221-7/+13
* radv: allocate descriptor BOs in the 32-bit addr spaceSamuel Pitoiset2018-05-221-1/+2
* radv: allocate the upload BO in the 32-bit addr spaceSamuel Pitoiset2018-05-221-1/+2
* radv: set amdgpu-32bit-address-high-bits LLVM attributeSamuel Pitoiset2018-05-223-0/+8
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