summaryrefslogtreecommitdiffstats
path: root/src/amd
Commit message (Collapse)AuthorAgeFilesLines
* radv: generate entrypoints from vk.xmlLionel Landwerlin2017-01-142-60/+56
| | | | | | | | | | v2: rework entry point iteration (Jason) cleanup unused imports v3: don't drop header installation (Emil) Signed-off-by: Lionel Landwerlin <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* radv: make device extension setup dynamicAndres Rodriguez2017-01-142-65/+130
| | | | | | | | | | | | | | Each physical device may have different extensions than one another. Furthermore, depending on the software stack, some extensions may not be accessible. If an extension is conditional, it can be registered only when necessary. v2: removed unused function and fixed indentation Signed-off-by: Andres Rodriguez <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: rename global extension properties structsAndres Rodriguez2017-01-141-14/+14
| | | | | | | | | | | | All extension arrays are global, but only one of them refers to instance extensions. The device extension array refers to extensions that are common across all physical devices. This disctinction will be more imporant once we have dynamic extension support for devices. Signed-off-by: Andres Rodriguez <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: use a winsys context per-queue, instead of per device v2Andres Rodriguez2017-01-143-21/+22
| | | | | | | | | | | | | | | Queues are independent execution streams. The vulkan spec provides no ordering guarantees for different queues. By using a single context for all queues, we are forcing all commands into an unecessary FIFO ordering. This change is a preparation step to allow our-of-ordering scheduling of certain work tasks. v2: Fix a rebase error with radv_QueueSubmit() and trace_bo Signed-off-by: Andres Rodriguez <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: Support loader interface version 3.Bas Nieuwenhuizen2017-01-131-0/+45
| | | | | | | | | Port of 1e41d7f7b0855934744fe578ba4eae9209ee69f7: "anv: Support loader interface version 3 (patch v2)" Signed-off-by: Bas Nieuwenhuizen <[email protected]> Cc: [email protected] Reviewed-by: Emil Velikov <[email protected]>
* radv: remove some unused macros and functionsGrazvydas Ignotas2017-01-132-33/+1
| | | | | | | | | These seem unlikely to be used. Also remove irrelevant comment about SKL. v2: forgot to rebase on master Signed-off-by: Grazvydas Ignotas <[email protected]>
* ac: automake: ensure that ./common is generatedEmil Velikov2017-01-131-0/+1
| | | | | | | | | | | Depending on the autoconf (or friends) version one may or may not have the ./common folder created. Thus in the latter case we'll fail to generate the file. Reviewed-by: Thierry Reding <[email protected]> Tested-by: Darren Salt <[email protected]> Reported-by: Darren Salt <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
* ac/nir: use ac_emit_fdiv throughoutNicolai Hähnle2017-01-131-22/+6
| | | | | | | | ... and eliminate emit_fdiv and nir_to_llvm_context::fpmath_md_*, which are now unused. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac/nir: use ac_build_gather_values[_extended] throughoutNicolai Hähnle2017-01-131-65/+24
| | | | | | | | ... and eliminate the non-ac copies. Mostly straight-forward search & replace. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac/nir: use ac_emit_llvm_intrinsic throughoutNicolai Hähnle2017-01-131-79/+41
| | | | | | | | ... by straight-forward search & replace, and eliminate emit_llvm_intrinsic. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* amd/common: unify cube map coordinate handling between radeonsi and radvNicolai Hähnle2017-01-133-196/+429
| | | | | | | | | | | | | | | Code is taken from a combination of radv (for the more basic functions, to avoid gallivm dependencies) and radeonsi (for the new and improved derivative calculations). v2: add 0.5 offset to tex coords only after derivative calculation v3: - really only touch the first three coordinates - rebase on the removal of the 1.5 --> 0.5 offset change Reviewed-by: Bas Nieuwenhuizen <[email protected]> (v2) Reviewed-by: Marek Olšák <[email protected]>
* ac/debug: move .gitignore for sid_tables.h tooGrazvydas Ignotas2017-01-131-0/+1
| | | | | | | | b838f642 "ac/debug: Move sid_tables.h generation to common code." moved sid_tables.h but forgot the corresponding .gitignore. Signed-off-by: Grazvydas Ignotas <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* ac, radeonsi: automake: add missing builddir includeEmil Velikov2017-01-121-0/+1
| | | | | | | | | | The generated file is correctly stored in the builddir as of earlier commit. Yet the commit forgot to add the respective include flag thus the compiler would error out failing to find sid_tables.h Bugzila: https://bugs.freedesktop.org/show_bug.cgi?id=99389 Fixes: d1dc22eb466 "ac: automake: rework sid_tables.h generation" Signed-off-by: Emil Velikov <[email protected]>
* radv: Call NIR passes using NIR_PASS_V.Bas Nieuwenhuizen2017-01-121-17/+7
| | | | | | | | Port of faa1edeeb7bbe9321c79587e592dce812e8caa78 "anv/pipeline: Call NIR passes using NIR_PASS_V" Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* radv: Call nir_lower_constant_initializers.Bas Nieuwenhuizen2017-01-121-0/+13
| | | | | | | | | Port of c5d664f9dc2d281c74844cef36ecb9f5862a8f6a "anv/pipeline: Call nir_lower_constant_initializers" Signed-off-by: Bas Nieuwenhuizen <[email protected]> Cc: <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* radv: Only call remove_dead_variables once.Bas Nieuwenhuizen2017-01-121-3/+3
| | | | | | | | Port of 43e0b0d4b255d910616c10e3e01bfec5db469e0e "anv/pipeline: Only call remove_dead_variables once" Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* ac: automake: rework sid_tables.h generationEmil Velikov2017-01-122-3/+3
| | | | | | | | | | | | | Drop $(srcdir)/ prefix analogous to before the file (and rule) movement and move it outside of the NEED_RADEON_LLVM conditional. Otherwise the build may fail as below. make[3]: *** No rule to make target 'common/sid_tables.h', needed by 'distdir'. Stop. Fixes: b838f642371 "ac/debug: Move sid_tables.h generation to common code." Signed-off-by: Emil Velikov <[email protected]>
* vulkan: Add new cast macros for VkIcd typesChad Versace2017-01-121-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We can't import the latest vk_icd.h because the new header breaks the Mesa build. This patch defines new casting macros, ICD_DEFINE_NONDISP_HANDLE_CASTS() and ICD_FROM_HANDLE(), which can handle both the old and new vk_icd.h, and will prevent the build from breaking when we update the header. In the old vk_icd.h, types were defined as: typedef struct _VkIcdFoo { ... } VkIcdFoo; Commit 6ebba1f6 in the Vulkan loader changed the above to typedef { ... } VkIcdFoo; because the old definitions violated the C and C++ specs. According to the specs, identifiers that begins with an underscore followed by an uppercase letter are reserved. (It's pedantic, I know), See the Github issue referenced below. References: https://github.com/KhronosGroup/Vulkan-LoaderAndValidationLayers/issues/7 References: https://github.com/KhronosGroup/Vulkan-LoaderAndValidationLayers/commit/6ebba1f630015af7a78767a15c1e74ba9b23601c Reviewed-by: Emil Velikov <[email protected]> Cc: [email protected]
* radv: fix multi-viewport emissionDave Airlie2017-01-111-2/+2
| | | | | | | This set context req seq was in the wrong place. Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv/ac: add support for multi sample image coordsDave Airlie2017-01-101-1/+16
| | | | | | | | | | | | | This just adds the nir->llvm support, enabling the extension causes some failures on llvm 3.9 at least, but this code seems fine. NIR passes the sampler in src[1].x, and we LLVM/SI requires it as the last parameters in the coords (coord[2] for 2D, coord[3] for 2DArray). Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: Create single RADV_DEBUG env var.Bas Nieuwenhuizen2017-01-096-36/+53
| | | | | | | | | | | Also changed RADV_SHOW_QUEUES to a no compute queue option. That would make more sense later when the compute queue is established, but the transfer queue still experimental. v2: Don't include the trace flag. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* ac/debug: Dump indirect buffers.Bas Nieuwenhuizen2017-01-094-6/+31
| | | | | | | | | | | | | | This is for handling chained command buffers and secondary command buffers. It doesn't handle the trace id for secondary command buffers yet, but I don't think that is possible in general with just writes, as we could call a secondary command buffer multiple times. I think this is good enough for now, as the most useful case is the chaining when we grow an IB. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Dump command buffer on hang.Bas Nieuwenhuizen2017-01-096-9/+150
| | | | | | | | | | | | | v2: - Now use the filename specified by RADV_TRACE_FILE env var. - Use the same var to enable tracing. I thought we could as well always set the filename explicitly instead of having some arbitrary defaults, and at that point we don't need a separate feature enable. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* ac/debug: Move IB decode to common code.Bas Nieuwenhuizen2017-01-094-0/+405
| | | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* ac/debug: Move sid_tables.h generation to common code.Bas Nieuwenhuizen2017-01-094-2/+306
| | | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* spirv: add support for doubles to OpSpecConstantSamuel Iglesias Gonsálvez2017-01-091-1/+4
| | | | | | | | | v2 (Jason): - Fix indent in radv change - Add vtn_u64_literal() helper to take 64 bits (Jason) Signed-off-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* radv: drop unused fields in physical device.Dave Airlie2017-01-091-6/+0
| | | | Signed-off-by: Dave Airlie <[email protected]>
* radv: fix depth transitions with layerCount = VK_REMAINING_ARRAY_LAYERSPierre-Loup A. Griffais2017-01-071-1/+1
| | | | | | | | | Interpreting layerCount literally would try to create billions of image views in radv_process_depth_image_inplace(). Signed-off-by: Pierre-Loup A. Griffais <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radeonsi: do all math in bytes in SI DMA codeMarek Olšák2017-01-051-2/+4
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* anv,radv: disable StorageImageWriteWithoutFormat for nowIlia Mirkin2016-12-311-1/+1
| | | | | | | | | | | The SPIR-V capability isn't even marked as enabled, and there are no tests in Vulkan-CTS. Per Jason Ekstrand, this won't work in anv as such write-only surfaces require additional setup which is currently not performed. Signed-off-by: Ilia Mirkin <[email protected]> Acked-by: Dave Airlie <[email protected]> Acked-by: Jason Ekstrand <[email protected]>
* spirv: always expose SpvCapabilityStorageImageExtendedFormatsIlia Mirkin2016-12-291-1/+0
| | | | | | | | | | I forgot to do this in commit 76b97d544e ("anv: enable storage image extended formats"). Since both drivers support this now, no need for the conditional enable. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: only allow cmask/dcc in color optimal.Dave Airlie2016-12-301-3/+2
| | | | | | | | I had this on transfers due to the clear color cmd, but it seems like that path shouldn't get fast clears. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: only allow cmask/dcc on exclusive or concurrent with graphics queue.Dave Airlie2016-12-301-3/+6
| | | | | | | Otherwise we don't get the barriers to flush dcc etc. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: denote support for extended storage image formats.Dave Airlie2016-12-281-2/+4
| | | | | | | | | I'm sure anv has support for these as well, but this is just a first use of the interface to allow different supported spir-v features. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: add some asserts for operations on general queueDave Airlie2016-12-272-0/+3
| | | | | | These might be useful in the future, or not. Signed-off-by: Dave Airlie <[email protected]>
* radv: Also skip DCC clear flushes for compute.Bas Nieuwenhuizen2016-12-274-12/+16
| | | | | | (airlied: fixes DOOM hang with compute queue enabled) Reviewed-by: Dave Airlie <[email protected]> Signed-off-by: Bas Nieuwenhuizen <[email protected]>
* radv: handle queue present directly to winsysDave Airlie2016-12-261-1/+9
| | | | | | | | | | Don't call the QueueSubmit interface, just call direct to the winsys, so we can pass the wait semaphores. Noticed while debugging doom, doesn't fix anything. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: fix rendering to b10g11r11_ufloat_pack32Dave Airlie2016-12-261-1/+1
| | | | | | | | | | doom was causing a printf about an illegal color, it was due the non-void returning -1, and the other function checking for 4, align these. Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: handle multi-component shared load/stores.Dave Airlie2016-12-261-12/+29
| | | | | | | This was seen in doom shaders, so handle it properly. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave AIrlie <[email protected]>
* radv: return count of queue families writtenDamien Grassart2016-12-251-1/+4
| | | | | | | | | | The Vulkan spec indicates that vkGetPhysicalDeviceQueueFamilyProperties() should overwrite pQueueFamilyPropertyCount with the number of structures actually written to pQueueFamilyProperties. Signed-off-by: Damien Grassart <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: set some proper values for interp offset limits.Dave Airlie2016-12-231-3/+3
| | | | | | | | These are taken from the amdgpu-pro driver, and cause no CTS change. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: bump texel offsets to align with radeonsiDave Airlie2016-12-231-4/+4
| | | | | | | | | | it appears from the amdgpu-pro results the hw can do more, but let's just align with radeonsi for now. No CTS regressions. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: fix dual source blendingFredrik Höglund2016-12-221-2/+2
| | | | | | | | | | | | | | | | | | | | Add the index to the location when assigning driver locations for output variables. Otherwise two fragment shader outputs declared as: layout (location = 0, index = 0) out vec4 output1; layout (location = 0, index = 1) out vec4 output2; will end up aliasing one another. Note that this patch will make the second output variable in the above example alias a possible third output variable with location = 1 and index = 0. But this shouldn't be a problem in practice since only one color attachment is supported when dual-source blending is used. Cc: "13.0" <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: enable shaderStorageImageExtendedFormatsDave Airlie2016-12-221-1/+1
| | | | | | | This passes all the CTS tests that get enabled for this. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: enable shaderGatherImageExtendedDave Airlie2016-12-221-1/+1
| | | | | | | | | Thanks to Ilia's patch this works fine on radv. No regressions in CTS, all enabled tests pass. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/image: only touch queue family info for concurrent images.Dave Airlie2016-12-211-2/+4
| | | | | | | | | | The spec says to ignore these fields for exclusive images. Fixes crashes in: dEQP-VK.clipping.* Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: flush smem for uniform buffer bit.Dave Airlie2016-12-211-1/+3
| | | | | | | | (cc'ing stable as I'd like to backport the ubo speedup as well) Reviewed-by: Bas Nieuwenhuizen <[email protected]> Cc: "13.0" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeonsi: add Polaris12 support (v3)Junwei Zhang2016-12-214-1/+8
| | | | | | | | | | | v2: use gfxip names for llvm 4.0+ v3: use tonga for llvm <= 3.8, drop gfxip name, we can just change that we change the other asics. Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Junwei Zhang <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Acked-by: Christian König <[email protected]>
* radv: Use correct workgroup size limits.Bas Nieuwenhuizen2016-12-181-4/+4
| | | | | | | Not sure where the 16k comes from, but pretty sure 2k is the max. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: expose the compute queueDave Airlie2016-12-181-11/+41
| | | | | | | v2: Don't expose the SDMA queue and use the CIK check also in the second if. (Bas) Reviewed-by: Bas Nieuwenhuizen <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-27 09:02:53 +0000