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* amd/common: add ac_vgt_gs_mode() helperSamuel Pitoiset2017-12-183-26/+39
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: add ac_get_cb_shader_mask() helperSamuel Pitoiset2017-12-183-33/+39
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* Revert "radv: do not load unused gl_LocalInvocationID/gl_WorkGroupID components"Samuel Pitoiset2017-12-181-5/+2
| | | | | | | | | | | | | This reverts commit 2294d35b243dee15af15895e876a63b7d22e48cc. We can't do this without adjusting the input SGPRs/VGPRs logic. For now, just revert it. I will send a proper solution later. It fixes a rendering issue in F1 2017 that CTS didn't catch up. Signed-off-by: Samuel Pitoiset <[email protected]> Tested-by: Alex Smith <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: port merge tess info from anvDave Airlie2017-12-181-0/+40
| | | | | | | | | | | anv merges the tess info correctly, but radv wasn't doing this. This fixes hangs in dEQP-VK.tessellation.winding.default_domain.hlsl_triangles_ccw Fixes: 60fc0544e0 (radv/pipeline: handle tessellation shader compilation) Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: Add external fence support.Bas Nieuwenhuizen2017-12-182-0/+22
| | | | Reviewed-by: Dave Airlie <[email protected]>
* radv: Implement VK_KHR_external_fence_fd.Bas Nieuwenhuizen2017-12-182-0/+48
| | | | Reviewed-by: Dave Airlie <[email protected]>
* radv: Implement fences based on syncobjs.Bas Nieuwenhuizen2017-12-183-15/+109
| | | | Reviewed-by: Dave Airlie <[email protected]>
* amd/common: Add detection of the syncobj wait/signal/reset ioctls.Bas Nieuwenhuizen2017-12-182-0/+2
| | | | | | First amdgpu bump after inclusion was 20 (which was done for local BOs). Reviewed-by: Dave Airlie <[email protected]>
* radv: Add syncobj signal/reset/wait to winsys.Bas Nieuwenhuizen2017-12-182-0/+44
| | | | Reviewed-by: Dave Airlie <[email protected]>
* radv: Fix multi-layer blits.Bas Nieuwenhuizen2017-12-181-25/+24
| | | | | | | | | We did not set the layer correctly for the dst, as we would keep using the base layer. Same for the source image. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102710 CC: <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* amd/common: add ac_build_waitcnt()Samuel Pitoiset2017-12-143-12/+13
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: more use of i32_1Samuel Pitoiset2017-12-141-4/+4
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: more use of i32_0Samuel Pitoiset2017-12-141-9/+9
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radeonsi: make use of ac_build_fdiv()Samuel Pitoiset2017-12-141-0/+1
| | | | | | | And move the comment to amd/common. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: export SampleMask from pixel shaders at full rateSamuel Pitoiset2017-12-142-16/+41
| | | | | | | | | | | Use 16_ABGR instead of 32_ABGR if Z isn't written. Ported from RadeonSI. No CTS regressions on Polaris. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: add ac_get_spi_shader_z_format()Samuel Pitoiset2017-12-144-1/+84
| | | | | | | | ac_shader_util.c will contain shader helpers for RadeonSI and RADV. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: do not load the local invocation index when it's unusedSamuel Pitoiset2017-12-144-2/+7
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: do not load unused gl_LocalInvocationID/gl_WorkGroupID componentsSamuel Pitoiset2017-12-141-3/+8
| | | | | | | | We should also not load the input SGPRs and VGPRS, but let's start with this for now. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: scan which components of gl_LocalInvocationID are usedSamuel Pitoiset2017-12-142-1/+7
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: scan which components of gl_WorkGroupID are usedSamuel Pitoiset2017-12-142-0/+9
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: set FORCE_SIMD_DIST(1) for compute when profitableSamuel Pitoiset2017-12-141-0/+14
| | | | | | | Ported from RadeonSI. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: calculate best compute resource limitsSamuel Pitoiset2017-12-141-1/+14
| | | | | | | Ported from RadeonSI. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: store the dispatch initiator into the deviceSamuel Pitoiset2017-12-143-11/+12
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: replace grid_components_used by uses_grid_sizeSamuel Pitoiset2017-12-143-5/+6
| | | | | | | | Use a boolean instead because the number of needed SGPRs is always 3. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: always emit all compute block componentsSamuel Pitoiset2017-12-142-13/+11
| | | | | | | | | The number of grid components is always 3 when gl_NumWorkGroups is declared, because it relies on the number of components of nir_instrinsic_load_num_work_groups. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: Don't advertise VK_EXT_debug_report.Bas Nieuwenhuizen2017-12-141-1/+0
| | | | | | | We never supported it. Missed during copy and pasting. Fixes: 17201a2eb0b "radv: port to using updated anv entrypoint/extension generator." Reviewed-by: Samuel Pitoiset <[email protected]>
* ac: fix nir_op_f2f64Timothy Arceri2017-12-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | Without this we get the error "FPExt only operates on FP" when converting the following: vec1 32 ssa_5 = b2f ssa_4 vec1 64 ssa_6 = f2f64 ssa_5 Which results in: %44 = and i32 %43, 1065353216 %45 = fpext i32 %44 to double With this patch we now get: %44 = and i32 %43, 1065353216 %45 = bitcast i32 %44 to float %46 = fpext float %45 to double Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: Support vulkan_resource_reindex.Bas Nieuwenhuizen2017-12-121-0/+14
| | | | | Fixes: 93b4cb61eb2 "spirv: Allow OpPtrAccessChain for block indices" Reviewed-by: Dave Airlie <[email protected]>
* ac/nir: Don't load the descriptor in vulkan_resource_index.Bas Nieuwenhuizen2017-12-121-5/+13
| | | | | | | | | | | To support the reindex intrinsic, we need the result to be something on which we can adjust the index/address. Since it is all within a basic block, the compiler should be able to merge any extra loads. v2: Change visit_get_buffer_size too. Reviewed-by: Dave Airlie <[email protected]>
* radv: Don't use local BOs when allocating with export options.Bas Nieuwenhuizen2017-12-101-1/+3
| | | | | | | | | If the app does not plan to put a buffer or image in it (why? But it is allowed and CTS does it), they do not need to allocate it with the deciate allocation struct. Fixes: a639d40f133 "radv: add support for local bos. (v3)" Reviewed-by: Dave Airlie <[email protected]>
* radv: do not print ASM to stderr when dumping shadersSamuel Pitoiset2017-12-081-1/+1
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv/winsys: implement query_value()Samuel Pitoiset2017-12-082-0/+72
| | | | | | | | | Might be useful to know the VRAM/GTT usage, the number of VRAM CPU page faults, etc. Nothing is currently using that new interface, but it's a first step. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: remove useless check radv_set_dcc_need_cmask_elim_pred()Samuel Pitoiset2017-12-081-2/+1
| | | | | | | emit_fast_color_clear() already checks that. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: remove useless checks in radv_set_{color,depth}_clear_regs()Samuel Pitoiset2017-12-081-4/+2
| | | | | | | Already checked by the respective callers. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: only re-mit the index type when it changesSamuel Pitoiset2017-12-082-10/+24
| | | | | | | | | dota2 binds a ton of index buffers but the type is always 16-bit. Note that we have to invalidate the type when switching from indexed draws to normal draws. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: only reset command buffers that are not in the initial stateSamuel Pitoiset2017-12-081-4/+9
| | | | | | | | dota2 always calls vkResetCommandBuffer() before vkBeginCommandBuffer() which is quite useless. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: track different status of a command bufferSamuel Pitoiset2017-12-083-0/+17
| | | | | | | | | RADV_CMD_BUFFER_STATUS_INVALID is not used for now, but I think it makes sense to declare it. Could be used later with better command buffer error handling. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: fix TC-compat HTILE with VK_FORMAT_D32_SFLOAT_S8_UINT on VegaSamuel Pitoiset2017-12-081-0/+6
| | | | | | | | | | | | Copied from RadeonSI. This fixes all CTS dEQP-VK.renderpass.dedicated_allocation.formats.d32_sfloat_s8_uint.clear.* And some other ones which use the same format. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: use a faster version for nir_op_pack_half_2x16Samuel Pitoiset2017-12-071-11/+1
| | | | | | | | | | | | | | | | | | | | | This patch is ported from RadeonSI and it has two effects. It fixes a rendering issue which affects F1 2017 and Dawn of War 3 (Vega only) because LLVM was ending up by generating the new v_mad_mix_{hi,lo} instructions which appear to be buggy in some way. Not sure if Mesa is generating something wrong or if the issue is in LLVM only. Anyway, that explains why the DOW3 issue can't be reproduced with GL on Vega. It also improves performance because v_cvt_pkrtz_f16 is faster, and because I guess the rounding mode behaviour is similar between GL and VK, we can use it. About performance, it improves Talos by +3/4% but I don't see any other impacts. No CTS regressions on Polaris. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Add LLVM version to the device name stringAlex Smith2017-12-072-26/+37
| | | | | | | | | | Allows apps to determine the LLVM version so that they can decide whether or not to enable workarounds for LLVM issues. Signed-off-by: Alex Smith <[email protected]> Cc: "17.2 17.3" <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Tested-by: Dieter Nützel <[email protected]>
* radv: fix a case statement in GetMemoryFdPropertiesKHRFredrik Höglund2017-12-061-1/+1
| | | | | | | | | | The handle type in the case statement is supposed to be VK_EXTERNAL_- MEMORY_HANDLE_TYPE_DMA_BUF_BIT_EXT. Fixes: 546e747867c ("radv: Implement VK_EXT_external_memory_dma_buf") Signed-off-by: Fredrik Höglund <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: fix a crash in radv_can_dump_shader()Samuel Pitoiset2017-12-041-2/+2
| | | | | | | module can be NULL, oops. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: Implement VK_KHR_get_surface_capabilities2Jason Ekstrand2017-12-042-0/+27
| | | | | | | | The WSI core code does all the hard work. Just add the wrappers and turn it on. Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* vulkan/wsi: Initialize individual WSI interfaces in wsi_device_initJason Ekstrand2017-12-041-30/+6
| | | | | | | | Now that we have anv_device_init/finish functions, there's no reason to have the individual driver do any more work than that. Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* vulkan/wsi: Drop some unneeded cruft from the APIJason Ekstrand2017-12-041-17/+1
| | | | | | | | This drops the unneeded callbacks struct as well as the queue_get_family callback we were using before we'd pulled QueuePresent inside. Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* vulkan/wsi: Add wrappers for all of the surface queriesJason Ekstrand2017-12-041-20/+21
| | | | | | | This lets us move wsi_interface to wsi_common_private.h Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* vulkan/wsi: Drop the can_handle_different_gpu parameter from get_supportJason Ekstrand2017-12-041-1/+1
| | | | | | | Both anv and radv can handle prime now. Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* vulkan/wsi: Add a helper for AcquireNextImageJason Ekstrand2017-12-041-5/+10
| | | | | | | | | Unfortunately, due to the fact that AcquireNextImage does not take a queue, the ANV trick for triggering the fence won't work in general. We leave dealing with the fence up to the caller for now. Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* vulkan/wsi: move swapchain create/destroy to common codeDave Airlie2017-12-041-34/+8
| | | | | | | | | | v2 (Jason Ekstrand): - Rebase - Alter the names of the helpers to better match the vulkan entrypoints - Use the helpers in anv Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Chad Versace <[email protected]>
* vulkan/wsi: Move get_images into common codeJason Ekstrand2017-12-041-4/+3
| | | | | | | | | This moves bits out of all four corners (anv, radv, x11, wayland) and into the wsi common code. We also switch to using an outarray to ensure we get our return code right. Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Chad Versace <[email protected]>
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