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* vulkan/wsi/x11: add support to detect if we can support rendering (v3)Dave Airlie2017-02-204-4/+12
| | | | | | | | | | | | | | | | | This adds support to radv_GetPhysicalDeviceXlibPresentationSupportKHR and radv_GetPhysicalDeviceXcbPresentationSupportKHR to check if the local device file descriptor is compatible with the descriptor retrieved from the X server via DRI3. This will stop radv binding to an X server until we have prime support in place. Hopefully apps use this API before trying to render things. v2: drop unneeded function, don't leak memory. (jekstrand) v3: also check in surface_get_support callback. Reviewed-by: Jason Ekstrand <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* Revert "radv: detect command buffers that do no work and drop them (v2)"Dave Airlie2017-02-206-32/+8
| | | | | | | | | | | | | | | | This just keeps popping up minor problems and regressions we should revisit in a more sustainable manner later. This also reverts: Revert "radv: query cmds should mark a cmd buffer as having draws." Revert "radv: also fixup event emission to not get culled." This reverts commit d1640e79328af4a63c056e3ccab299a3bffbede7. This reverts commit 8b47b97215af7157bc15676167cab73aa5a61a76. This reverts commit b4b19afebeac84ddce3f1f8b7ffe0da6474fe29a. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: Handle VK_REMAINING_ARRAY_LAYERS in fast clear eliminate.Bas Nieuwenhuizen2017-02-191-2/+2
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: handle layered fast clears.Dave Airlie2017-02-195-29/+43
| | | | | | | | | | | | | | This iterates the fast clear flush across the layers in the specified range. It also moves the compute resolve flush into the function and builds the range in there. This fixes: dEQP-VK.geometry.layered.* regressions since fast clears. Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: pass subresourceRange by pointer.Dave Airlie2017-02-191-13/+13
| | | | | | | This struct is 5 dwords, we should really just pass a pointer to it. Signed-off-by: Dave Airlie <[email protected]>
* radv: fix typo in a2b10g10r10 fast clear calculation.Dave Airlie2017-02-191-1/+1
| | | | | | | | | | | | This fixes: dEQP-VK.renderpass.formats.a2b10g10r10_unorm_pack32* regressions. Fixes: f22836dbdd radv: Add CPU color packing for VK_FORMAT_A2B10G10R10_UNORM_PACK32. Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: Invert ring SGPR check.Bas Nieuwenhuizen2017-02-191-1/+1
| | | | | | | | | I assume this wants to check if all pipelines use the same SGPR for the rings. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Acked-by: Edward O'Callaghan <[email protected]>
* radv: Clamp framebuffer dimensions to min. attachment dimensions.Bas Nieuwenhuizen2017-02-191-6/+13
| | | | | | | | Even though the preferred stance is not to fix incorrect applications via the driver, this prevents some nasty GPU hangs. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* ac/llvm: use min+max instead of AMDGPU.clamp on LLVM 5.0Marek Olšák2017-02-181-0/+17
| | | | | | | It selects v_med3_f32, which has the same rate & size. Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: stop using TGSI_OPCODE_CLAMP by moving it amd/commonMarek Olšák2017-02-182-0/+16
| | | | | Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* ac/llvm: fix various findMSB bugsMarek Olšák2017-02-181-2/+3
| | | | | | sffbh needs to be suffixed with ".i32" Reviewed-by: Dave Airlie <[email protected]>
* radv: Use different allocator for descriptor set vram.Bas Nieuwenhuizen2017-02-172-71/+29
| | | | | | | | | This one only keeps allocated memory in the list, and list nodes in the descriptor sets. Thsi doesn't need messing around with max_sets, and we get automatic merging of free regions. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Never try to create more than max_sets descriptor sets.Bas Nieuwenhuizen2017-02-172-2/+6
| | | | | | | | | | | We only use the freed ones after all free space has been used. If the app only allocates small descriptor sets, we might go over max_sets before the memory is full. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]> CC: <[email protected]> Fixes: f4e499ec79147f4172f3669ae9dafd941aaeeb65
* radv/ac: use shared umsb helper.Dave Airlie2017-02-161-17/+1
| | | | | Reviewed-by: Edward O'Callaghan <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeon/ac: add emit umsb shared code.Dave Airlie2017-02-162-0/+29
| | | | | | | | Since we shared imsb, makes sense to share umsb. Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeon/ac: use llvm.amdgcn.sffbh intrinsic instead of AMDGPU.flbit.i32Dave Airlie2017-02-161-1/+2
| | | | | | | | Use the newer intrinsic. Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/ac: use shader imsb emission code.Dave Airlie2017-02-161-17/+1
| | | | | Reviewed-by: Edward O'Callaghan <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeon/ac: add ac_emit_imsb helper.Dave Airlie2017-02-162-0/+28
| | | | | | | | | We want to use a different intrinsic on newer llvm, so move this code to a shared area. Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: add fast color clear for b10g11r11Dave Airlie2017-02-161-0/+5
| | | | | | | This is used in DOOM, so provide the fast clear path for it. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: Add support for shaderStorageImageReadWithoutFormat.Bas Nieuwenhuizen2017-02-152-1/+2
| | | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Add support for shaderStorageImageWriteWithoutFormat.Bas Nieuwenhuizen2017-02-152-2/+3
| | | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: also fixup event emission to not get culled.Dave Airlie2017-02-151-0/+1
| | | | | | | This is possibly a bad idea, I might have to consider a better one. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: query cmds should mark a cmd buffer as having draws.Dave Airlie2017-02-151-0/+4
| | | | | | | | This fixes a regression with the remove non-draw cmd buffers in queries. Fixes: 8b47b97215a radv: detect command buffers that do no work and drop them (v2) Signed-off-by: Dave Airlie <[email protected]>
* radv: fixup IA_MULTI_VGT_PARAM handling.Dave Airlie2017-02-144-31/+105
| | | | | | | | | This ports the remains of the workarounds from radeonsi for the non-TESS cases. It should provide equivalent workarounds for hawaii and bonarie. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: fix warning since using common gs emit codeDave Airlie2017-02-141-1/+0
| | | | Signed-off-by: Dave Airlie <[email protected]>
* radv: adopt some init config workarounds from radeonsi.Dave Airlie2017-02-151-2/+9
| | | | | | | | | Just one bonaire fix. Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Cc: "13.0 17.0" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: re-enable init gfx state on CIK.Dave Airlie2017-02-151-2/+1
| | | | | | | | | Once the color alignment was fixed this works fine now. Tested-by: Kai Wasserbäch <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: align the initial state command buffer.Dave Airlie2017-02-151-0/+7
| | | | | | | | | This just adds the padding to align this to an 8 dword boundary. Tested-by: Kai Wasserbäch <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: fix cik macroModeIndex.Dave Airlie2017-02-151-0/+14
| | | | | | | | | | This just a CIK fix ported from radeonsi. Tested-by: Kai Wasserbäch <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Cc: "13.0 17.0" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: change base aligmment for allocated memory.Dave Airlie2017-02-151-1/+1
| | | | | | | | | | | | | | | On some CIK (Hawaii) this needs to be at least 64k, I'm not 100% sure it doesn't need to be 128k. This was causing fast clear eliminate to overwrite the previous buffer, which since my gfx init code, was the indirect buffer. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=99692 Tested-by: Kai Wasserbäch <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Cc: "13.0 17.0" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/ac: use sendmsg emission interface.Dave Airlie2017-02-141-26/+4
| | | | | | | This uses the common code to emit the correct intrinsic. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeon/ac/llvm: add support for sendmsg emissionDave Airlie2017-02-142-0/+25
| | | | | | | | | This lets us use the new intrinsic on the correct version of llvm. Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: disable gfx init on CIK for nowDave Airlie2017-02-141-1/+2
| | | | | | | Luzipher on irc report this hangs his Hawaii, disable for now until I get time to debug. Signed-off-by: Dave Airlie <[email protected]>
* radv/ac: use common interp code for new intrinsicsDave Airlie2017-02-141-20/+41
| | | | | | | | This uses the common fs interp code to use the new llvm intrinsics so llvm can drop the old ones. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: use indirect buffer for initial gfx state.Dave Airlie2017-02-134-1/+62
| | | | | | | | | | This puts the common gfx state for the device into an indirect buffer, and just calls out to it, on CIK and above. This is taken from what radeonsi does. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: start splitting init config upDave Airlie2017-02-131-8/+20
| | | | | | | | This is just prep work for the following patch to use a common gfx init indirect buffer. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: don't pass physical device to si_init_ fns.Dave Airlie2017-02-133-11/+9
| | | | | | | This is just a trivial cleanup. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: detect command buffers that do no work and drop them (v2)Dave Airlie2017-02-135-8/+27
| | | | | | | | | | | | | | If a buffer is just full of flushes we flush things on command buffer submission, so don't bother submitting these. This will reduce some CPU overhead on dota2, which submits a fair few command streams that don't end up drawing anything. v2: reorganise loop to count first then malloc, rename some vars (Bas) Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: Fix radv_GetPhysicalDeviceQueueFamilyProperties2KHR.Bas Nieuwenhuizen2017-02-131-9/+36
| | | | | | | The struct have different size, so the arrays have different stride. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: reduce CPU overhead merging bo lists.Dave Airlie2017-02-121-1/+11
| | | | | | | | | | | | Just noticed we do a fair bit of unneeded searching here. Since we know that the buffers in a CS are unique already, the first time we get any buffers, we can just memcpy those into place, and when we are searching for subsequent CSes, we only have to search up until where the previous unique buffers were. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: handle queue submission with no cs but semaphoresDave Airlie2017-02-091-2/+20
| | | | | | | | | It's legal to submit just semaphores with no command streams, this patch fixes this case by emitting the empty cs, it also handles the fence emission for this case better. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: Add CPU color packing for VK_FORMAT_A2B10G10R10_UNORM_PACK32.Bas Nieuwenhuizen2017-02-081-2/+6
| | | | | | | | | For allowing fast color clears in the main render targets of dota2. [airlied: fix clear_vals[1] as suggested by Andres. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: handle dcc in explicit image resolve path. (v2)Dave Airlie2017-02-071-3/+8
| | | | | | | | We need to initialize dcc like we do in the subpass path. v2: fix initial/final layouts Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: Enable fast clears by default.Bas Nieuwenhuizen2017-02-073-4/+4
| | | | | | | | Works for me on dota2 and talos now. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Andres Rodriguez <[email protected]>
* radv: pass FMASK alignment to applicationDave Airlie2017-02-071-0/+1
| | | | | | | | As was done for dcc and cmask. Cc: "17.0" <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: Pass DCC alignment to application.Bas Nieuwenhuizen2017-02-071-0/+1
| | | | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Cc: "17.0" <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Andres Rodriguez <[email protected]>
* radv: Pass CMASK alignment to application.Bas Nieuwenhuizen2017-02-071-0/+1
| | | | | | | | | | CMASK alignment can be greater than image data alignment, so pass it to the app so that it knows what alignment to backing memory should have. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Cc: <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv/ac: avoid the fmask path when doing txs.Dave Airlie2017-02-061-1/+2
| | | | | | | | This fixes the vulkan samples deferredmultisampling test. Cc: "17.0" <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeon/ac: move common llvm build functions to a separate file.Dave Airlie2017-02-076-851/+933
| | | | | | | | | Suggested by Marek. Reviewed-by: Marek Olšák <[email protected]> Acked-by: Nicolai Hähnle <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: fix shared memory load/stores.Dave Airlie2017-02-031-0/+7
| | | | | | | | | | | If we have an indirect index here we need to scale it by attribute slots e.g. is this is vec2[256] then we get an indir_index in the 0.255 range but the vec2 are aligned inside vec4 slots. So scale the indir index, then extract the channels. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Cc: "17.0" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
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