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* Revert "radv: remove unnecessary memset() in radv_AllocateCommandBuffers()"Samuel Pitoiset2017-11-241-0/+3
* radv/winsys: improve error messages when the buffer list creation failedSamuel Pitoiset2017-11-241-3/+6
* radv/winsys: do not try to create a BO list with 0 buffersSamuel Pitoiset2017-11-241-3/+9
* amd: build addrlib with C++11Nicolai Hähnle2017-11-201-1/+1
* radv: use a 16 bytes array for the sampled/storage image descriptorsSamuel Pitoiset2017-11-203-12/+8
* radv: do not add the query pool BO to the list in vkCmdEndQuery()Samuel Pitoiset2017-11-201-1/+3
* radv: only load needed depth clear regs for fast depth clearsSamuel Pitoiset2017-11-201-2/+12
* radv: do not add the image BO in radv_set_depth_clear_regs()Samuel Pitoiset2017-11-201-2/+0
* radv: remove useless assertion in emit_depthstencil_clear()Samuel Pitoiset2017-11-201-4/+0
* radv: remove useless check in radv_set_depth_clear_regs()Samuel Pitoiset2017-11-201-1/+1
* radeon/common: add vcn enc ip info queryBoyuan Zhang2017-11-171-1/+9
* ac: add gs_{prim,invocation}_id to the abiTimothy Arceri2017-11-162-8/+10
* radv: it isn't an error to not support a format or driverDave Airlie2017-11-162-2/+2
* radv: add the vertex buffers BO to the list at bind timeSamuel Pitoiset2017-11-151-3/+3
* radv: replace vb_dirty with RADV_CMD_DIRTY_VERTEX_BUFFERSamuel Pitoiset2017-11-152-4/+5
* radv: drop radv_cmd_dirty_mask_t typedefSamuel Pitoiset2017-11-152-3/+2
* radv: use an unsigned 32-bit integer for radv_queue::family_indexSamuel Pitoiset2017-11-152-2/+2
* radv: do not add the image BO in radv_set_dcc_need_cmask_elim_pred()Samuel Pitoiset2017-11-151-2/+0
* radv: do not add the image BO in radv_set_color_clear_regs()Samuel Pitoiset2017-11-151-2/+0
* radv: force enable LLVM sisched for The Talos PrincipleSamuel Pitoiset2017-11-141-0/+20
* radv: add nosisched debug optionSamuel Pitoiset2017-11-142-0/+10
* radv: Free temporary syncobj after waiting on it.Bas Nieuwenhuizen2017-11-141-4/+18
* radv: Free syncobj with multiple imports.Bas Nieuwenhuizen2017-11-141-2/+8
* meson: Remove build_by_default from amd codeDylan Baker2017-11-132-2/+0
* radv: add unlikely() around radv_save_descriptors()Samuel Pitoiset2017-11-131-1/+1
* radv: optimize calling radv_cmd_buffer_trace_emit()Samuel Pitoiset2017-11-133-8/+12
* radv: optimize calling radv_save_pipeline()Samuel Pitoiset2017-11-131-5/+5
* radv: use vk_zalloc instead of vk_alloc+memsetSamuel Pitoiset2017-11-134-21/+13
* radv: remove unnecessary memset() in radv_AllocateCommandBuffers()Samuel Pitoiset2017-11-131-3/+0
* radv: remove useless initializations in radv_create_cmd_buffer()Samuel Pitoiset2017-11-131-2/+0
* radv: remove useless memset() in radv_CreateFence()Samuel Pitoiset2017-11-131-1/+0
* radv: use vk_error() everywhere an error is returnedSamuel Pitoiset2017-11-138-27/+27
* radv: make radv_emit_framebuffer_state() staticSamuel Pitoiset2017-11-132-3/+2
* radv: do not emit the framebuffer when restoring a passSamuel Pitoiset2017-11-131-1/+1
* radv: prefetch VBO descriptors at the right placeSamuel Pitoiset2017-11-132-0/+21
* radv: add radv_emit_prefetch_TC_L2_async() helperSamuel Pitoiset2017-11-131-2/+9
* radv: rename radv_emit_shaders_prefetch() to radv_emit_prefetch()Samuel Pitoiset2017-11-131-6/+6
* radv: emit esgs ring size in one place.Dave Airlie2017-11-132-7/+8
* radv: move calculating vs out info regs into pipeline.Dave Airlie2017-11-133-25/+34
* ac: add emit_vertex to the abiTimothy Arceri2017-11-122-5/+10
* radv: Fix architecture in radeon_icd.{arch}.jsonChad Versace2017-11-091-1/+1
* ac/nir: add support for all intrinsics. (v2)Dave Airlie2017-11-091-1/+31
* amd: add amdgpu_asic_addr.h to the sources listEmil Velikov2017-11-081-0/+1
* amd/addrlib: update to latest versionMarek Olšák2017-11-0831-3334/+1354
* radeonsi: use ac_create_target_machineMarek Olšák2017-11-072-2/+8
* radeonsi: use ac_get_llvm_processor_nameMarek Olšák2017-11-072-1/+3
* radeonsi: remove unused field in the PCI ID tableMarek Olšák2017-11-071-1/+1
* ac/nir: for ubo load use correct num_componentsDave Airlie2017-11-071-1/+1
* radv: move is_local up to the winsys level.Dave Airlie2017-11-064-3/+6
* radv: wrap cs_add_buffer in an inline. (v2)Dave Airlie2017-11-066-41/+49
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