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* amd: build addrlib with C++11Nicolai Hähnle2017-11-201-1/+1
| | | | | | | | | It is required for LLVM anyway. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103658 Fixes: 7f33e94e43a6 ("amd/addrlib: update to latest version") Tested-by: Vinson Lee <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radv: use a 16 bytes array for the sampled/storage image descriptorsSamuel Pitoiset2017-11-203-12/+8
| | | | | | | This allows to update them with only one memcpy(). Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: do not add the query pool BO to the list in vkCmdEndQuery()Samuel Pitoiset2017-11-201-1/+3
| | | | | | | | | As per the spec, the query identified by queryPool and query must currently be active. Applications have to call vkCmdBeginQuery() before, and thus the query pool BO will already be in the list. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: only load needed depth clear regs for fast depth clearsSamuel Pitoiset2017-11-201-2/+12
| | | | | | | | | Similar to how the driver sets the depth clear regs after a fast depth clear. Most of the time, this will copy a 32-bit reg instead of a 64-bit reg. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: do not add the image BO in radv_set_depth_clear_regs()Samuel Pitoiset2017-11-201-2/+0
| | | | | | | | | | For the fast path, radv_fill_buffer() ensures that the BO is already in the list. For the slow path, the depth surface is part of the framebuffer which means the BO is added to the list when the framebuffer is emitted. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: remove useless assertion in emit_depthstencil_clear()Samuel Pitoiset2017-11-201-4/+0
| | | | | | | Already checked in emit_clear(). Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: remove useless check in radv_set_depth_clear_regs()Samuel Pitoiset2017-11-201-1/+1
| | | | | | | | aspects can't be zero and there is an assertion that ensures it's not in emit_clear(). Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radeon/common: add vcn enc ip info queryBoyuan Zhang2017-11-171-1/+9
| | | | | | | New ip info query is needed for vcn encode Signed-off-by: Boyuan Zhang <[email protected]> Acked-by: Christian König <[email protected]>
* ac: add gs_{prim,invocation}_id to the abiTimothy Arceri2017-11-162-8/+10
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radv: it isn't an error to not support a format or driverDave Airlie2017-11-162-2/+2
| | | | | | | | | | | This reverts two of the vk_error changes: reporting unsupported format is common, and testing non-amdgpu drivers and ignoring them is also common. Fixes: cd64a4f70 (radv: use vk_error() everywhere an error is returned) Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: add the vertex buffers BO to the list at bind timeSamuel Pitoiset2017-11-151-3/+3
| | | | | | | | | | This should reduce the overhead of adding a BO to the current list, especially when the list is huge. Also, when a new pipeline is bound, we only need to update the descriptor, the buffer objects should already be in the list. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: replace vb_dirty with RADV_CMD_DIRTY_VERTEX_BUFFERSamuel Pitoiset2017-11-152-4/+5
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: drop radv_cmd_dirty_mask_t typedefSamuel Pitoiset2017-11-152-3/+2
| | | | | | | | I don't think we will need a 64-bit unsigned integer for the dirty flags in the future, and there is still 20 bits left. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: use an unsigned 32-bit integer for radv_queue::family_indexSamuel Pitoiset2017-11-152-2/+2
| | | | | | | | VkDeviceQueueCreateInfo::queueFamilyIndex is an unsigned 32-bit integer. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: do not add the image BO in radv_set_dcc_need_cmask_elim_pred()Samuel Pitoiset2017-11-151-2/+0
| | | | | | | radv_fill_buffer() ensures that the image BO is added to the list. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: do not add the image BO in radv_set_color_clear_regs()Samuel Pitoiset2017-11-151-2/+0
| | | | | | | radv_fill_buffer() ensures that the image BO is added to the list. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: force enable LLVM sisched for The Talos PrincipleSamuel Pitoiset2017-11-141-0/+20
| | | | | | | | | | It seems safe and it improves performance by +4% (73->76). A drirc based solution is not what we want for now, keep it simple and improve later if it's really needed. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: add nosisched debug optionSamuel Pitoiset2017-11-142-0/+10
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Free temporary syncobj after waiting on it.Bas Nieuwenhuizen2017-11-141-4/+18
| | | | | | | Otherwise we leak it. Fixes: eaa56eab6da "radv: initial support for shared semaphores (v2)" Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: Free syncobj with multiple imports.Bas Nieuwenhuizen2017-11-141-2/+8
| | | | | | | | Otherwise we can leak the old syncobj. Fixes: eaa56eab6da "radv: initial support for shared semaphores (v2)" Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* meson: Remove build_by_default from amd codeDylan Baker2017-11-132-2/+0
| | | | | | | This is the same logic as the previous two patches. Signed-off-by: Dylan Baker <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* radv: add unlikely() around radv_save_descriptors()Samuel Pitoiset2017-11-131-1/+1
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: optimize calling radv_cmd_buffer_trace_emit()Samuel Pitoiset2017-11-133-8/+12
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: optimize calling radv_save_pipeline()Samuel Pitoiset2017-11-131-5/+5
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: use vk_zalloc instead of vk_alloc+memsetSamuel Pitoiset2017-11-134-21/+13
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: remove unnecessary memset() in radv_AllocateCommandBuffers()Samuel Pitoiset2017-11-131-3/+0
| | | | | | | | This should not be needed, if the allocation fails an error is returned and the host should handle it. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: remove useless initializations in radv_create_cmd_buffer()Samuel Pitoiset2017-11-131-2/+0
| | | | | | | There is a memset() above. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: remove useless memset() in radv_CreateFence()Samuel Pitoiset2017-11-131-1/+0
| | | | | | | All radv_fence fields are initialized here. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: use vk_error() everywhere an error is returnedSamuel Pitoiset2017-11-138-27/+27
| | | | | | | For consistency and it might help for debugging purposes. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: make radv_emit_framebuffer_state() staticSamuel Pitoiset2017-11-132-3/+2
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: do not emit the framebuffer when restoring a passSamuel Pitoiset2017-11-131-1/+1
| | | | | | | | Instead just dirty RADV_CMD_DIRTY_FRAMEBUFFER and it will be re-emitted if necessary before the next draw. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: prefetch VBO descriptors at the right placeSamuel Pitoiset2017-11-132-0/+21
| | | | | | | | | | | Just after the vertex shader. This seems to give a minor boost for, at least, Serious Sam Fusion 2017 and Dawn of War 3. I don't see any real impacts with The Talos Principle. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add radv_emit_prefetch_TC_L2_async() helperSamuel Pitoiset2017-11-131-2/+9
| | | | | | | Will be used for VBO descriptors prefetching. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: rename radv_emit_shaders_prefetch() to radv_emit_prefetch()Samuel Pitoiset2017-11-131-6/+6
| | | | | | | | For consistency because this function will also prefetch VBO descriptors. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: emit esgs ring size in one place.Dave Airlie2017-11-132-7/+8
| | | | | | | | | This register is the same on all gpus so far, so emit it in one place and also for the pre-gfx9 gpus set the value in the pipeline creation. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: move calculating vs out info regs into pipeline.Dave Airlie2017-11-133-25/+34
| | | | | | | | This moves some calculations of register values into the pipeline construction, it saves looking at outinfo in the cmd buffer emit. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* ac: add emit_vertex to the abiTimothy Arceri2017-11-122-5/+10
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radv: Fix architecture in radeon_icd.{arch}.jsonChad Versace2017-11-091-1/+1
| | | | | | | | | | | | Use the host arch, not the target arch. In Meson and in recent Autotools, the host arch is where the binary will be used. The target arch is useful only when compiling a compiler. See: http://mesonbuild.com/Cross-compilation.html See: https://www.gnu.org/software/automake/manual/html_node/Cross_002dCompilation.html Reported-by: Eric Engestrom <[email protected]> Reviewed-by: Dylan Baker <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: add support for all intrinsics. (v2)Dave Airlie2017-11-091-1/+31
| | | | | | | | | | | This is derived from tgsi/radeonsi code from the GLSL intrinsics. This should pre-fix radv for the upcoming spirv patches. v2: actually use wait_cnt, sleep deprived dad time! (Bas) Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* amd: add amdgpu_asic_addr.h to the sources listEmil Velikov2017-11-081-0/+1
| | | | | | | Otherwise it will be missing from the release tarball Fixes: 7f33e94e43a ("amd/addrlib: update to latest version") Signed-off-by: Emil Velikov <[email protected]>
* amd/addrlib: update to latest versionMarek Olšák2017-11-0831-3334/+1354
| | | | | | | | | | | | This uses C++11 initializer lists. I just overwrote all Mesa files with internal addrlib and discarded hunks that we should probably keep, but I might have missed something. The code depending on ADDR_AM_BUILD is removed. We can add it back next time if needed. Acked-by: Nicolai Hähnle <[email protected]>
* radeonsi: use ac_create_target_machineMarek Olšák2017-11-072-2/+8
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: use ac_get_llvm_processor_nameMarek Olšák2017-11-072-1/+3
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: remove unused field in the PCI ID tableMarek Olšák2017-11-071-1/+1
| | | | Reviewed-by: Alex Deucher <[email protected]>
* ac/nir: for ubo load use correct num_componentsDave Airlie2017-11-071-1/+1
| | | | | | | | | I was hacking something stupid in doom, and hit an assert for the bitcast following this, it definitely looks like this should be the number of 32-bit components, not the instr level ones. Reviewed-by: Nicolai Hähnle <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: move is_local up to the winsys level.Dave Airlie2017-11-064-3/+6
| | | | | | | | We can avoid adding the buffer in the non-local case, this will avoid all the overhead of the indirect call. Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: wrap cs_add_buffer in an inline. (v2)Dave Airlie2017-11-066-41/+49
| | | | | | | | | The next patch will try and avoid calling the indirect function. v2: add a missing conversion. Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: when loading regs no need to add bufferDave Airlie2017-11-061-2/+0
| | | | | | | | The function that calls us has just added the buffer to the list already, no need to try and add it again. Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: pre-calculate user_data_0 registers and store in pipelineDave Airlie2017-11-065-52/+55
| | | | | | | | There's no point recalculating these the whole time on descriptor emission, just store them at pipeline creation. Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: add initial copy descriptor support. (v2)Dave Airlie2017-11-061-2/+53
| | | | | | | | | | | | It appears the latest dota2 vulkan uses this, and we get a hang in VR mode without it. v2: remove finishme I left in after finishing. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Andres Rodriguez <[email protected]> Cc: "17.2 17.3" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
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