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* radv: don't use hw resolves for r16g16 norm formats.Dave Airlie2018-01-241-1/+4
* radv: don't use hw resolve for integer image formatsDave Airlie2018-01-241-0/+5
* radv: add fs_key meta format support to resolve passes.Dave Airlie2018-01-242-30/+61
* ac/nir: Use instance_rate_inputs per attribute, not per variable.Bas Nieuwenhuizen2018-01-231-14/+13
* ac: fix image load store for GLSL_SAMPLER_DIM_3DTimothy Arceri2018-01-231-1/+3
* ac: image size builtin for GLSL_SAMPLER_DIM_3DTimothy Arceri2018-01-231-1/+2
* ac: fix ac_build_varying_gather_values() for packed layoutsTimothy Arceri2018-01-231-1/+1
* ac: remove arrays when when querying sampler infoTimothy Arceri2018-01-231-3/+1
* ac: fix emit vertex stream parameterTimothy Arceri2018-01-231-2/+3
* ac: add support for gl_HelperInvocationTimothy Arceri2018-01-231-0/+14
* ac/radeonsi: add emit primitive to the abiTimothy Arceri2018-01-232-2/+7
* ac: add stream handling to visit_end_primitive()Timothy Arceri2018-01-231-4/+3
* ac/nir/radeonsi: add ARB_shader_ballot supportTimothy Arceri2018-01-231-0/+37
* ac/nir: add ARB_shader_group_vote supportTimothy Arceri2018-01-231-0/+15
* radv: add an option that allows to dump pre-optimization irSamuel Pitoiset2018-01-225-0/+8
* radv: restore previous stencil reference after depth-stencil clearMatthew Nicholls2018-01-221-0/+6
* radv: Don't allow 3d or 1d depth/stencil textures.Bas Nieuwenhuizen2018-01-221-0/+3
* radv: Init variant entry with memset.Bas Nieuwenhuizen2018-01-221-0/+1
* radv: Fix bufimage failure deallocation.Bas Nieuwenhuizen2018-01-221-4/+6
* radv: Fix fragment resolve init memory allocation failure paths.Bas Nieuwenhuizen2018-01-221-8/+6
* radv: Fix freeing meta state if the device pipeline cache fails to allocate.Bas Nieuwenhuizen2018-01-221-1/+3
* radv: Fix memory allocation failure path in compute resolve init.Bas Nieuwenhuizen2018-01-221-1/+10
* radv: Fix ordering issue in meta memory allocation failure path.Bas Nieuwenhuizen2018-01-221-2/+2
* autotools: include meson build files in tarballDylan Baker2018-01-192-2/+10
* radv: Always re-emit the sample position offset user SGPR.Bas Nieuwenhuizen2018-01-191-17/+17
* radv: emit pa_sc_mode_cntl_0 with multisample state.Bas Nieuwenhuizen2018-01-192-3/+4
* ac/nir: Fix vector extraction if source vector has >4 elements.Bas Nieuwenhuizen2018-01-191-16/+32
* ac/nir: Use correct 32-bit component writemask for 64-bit SSBO stores.Bas Nieuwenhuizen2018-01-191-9/+13
* ac/nir: Fix TCS output LDS offsets.Bas Nieuwenhuizen2018-01-191-5/+6
* radv: Use correct bindings for inputRate in key generation.Bas Nieuwenhuizen2018-01-191-1/+7
* radv: Implement VK_ANDROID_native_buffer.Bas Nieuwenhuizen2018-01-197-4/+407
* radv: Add create image flag to not use DCC/CMASK.Bas Nieuwenhuizen2018-01-192-19/+25
* radv: Generate VK_ANDROID_native_buffer.Bas Nieuwenhuizen2018-01-193-2/+9
* radv: Replace an assert with unreachable.Bas Nieuwenhuizen2018-01-191-1/+1
* radv: Remove DCC check on CS resolve dst image.Bas Nieuwenhuizen2018-01-191-3/+0
* ac: fix visit_ssa_undef() for doublesTimothy Arceri2018-01-191-2/+3
* ac/nir: account for view index in the user sgpr allocation.Dave Airlie2018-01-181-8/+34
* ac: tidy up array indexing logicTimothy Arceri2018-01-181-5/+1
* radv/ws: get rid of useless return valueDave Airlie2018-01-181-3/+2
* radv: Initialize DCC on transition from preinitialized.Bas Nieuwenhuizen2018-01-181-1/+3
* ac: fix buffer overflow bug in 64bit SSBO loadsTimothy Arceri2018-01-181-1/+4
* ac: fix nir_intrinsic_get_buffer_size for radeonsiTimothy Arceri2018-01-181-2/+2
* ac: rework load_tcs_{inputs,outputs}Timothy Arceri2018-01-181-73/+53
* ac/radeonsi: add tcs load outputs supportTimothy Arceri2018-01-182-19/+22
* radv: Implement VK_EXT_debug_report.Bas Nieuwenhuizen2018-01-173-0/+50
* ac: set no-signed-zeros-fp-math when RADV_DEBUG="unsafemath" is usedSamuel Pitoiset2018-01-161-0/+3
* ac: set fast math flags when RADV_DEBUG="unsafemath" is usedSamuel Pitoiset2018-01-161-2/+10
* ac: import lp_create_builder() from gallivmSamuel Pitoiset2018-01-162-0/+39
* ac: replace llvm.AMDGPU.kilp by llvm.amdgcn.kill with LLVM 6Samuel Pitoiset2018-01-161-10/+12
* Revert "ac/shader: gather If TES reads TESSINNER or TESSOUTER"Samuel Pitoiset2018-01-155-8/+4
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