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* radv: emit shader descriptor pointers consecutivelySamuel Pitoiset2018-05-291-47/+57
* radv: allow radv_emit_shader_pointer_head() to emit more pointersSamuel Pitoiset2018-05-291-3/+5
* radv: split radv_emit_shader_pointer()Samuel Pitoiset2018-05-291-5/+20
* radv: Implement VK_KHR_draw_indirect_count.Bas Nieuwenhuizen2018-05-282-0/+50
* radv: Implement alternate GFX9 scissor workaround.Bas Nieuwenhuizen2018-05-281-33/+47
* radv: run the EarlyCSEMemSSA LLVM passSamuel Pitoiset2018-05-251-0/+2
* radv: fix dumping compute shader on the graphics queueSamuel Pitoiset2018-05-251-5/+8
* radv: add radv_dump_pipeline_state() helperSamuel Pitoiset2018-05-251-6/+11
* radv: rework how shaders are dumped when generating a hang reportSamuel Pitoiset2018-05-251-26/+15
* radv: remove unused parameter in radv_dump_annotated_shader()Samuel Pitoiset2018-05-251-8/+6
* radeonsi: remove some old gfx 9.x registersMarek Olšák2018-05-241-48/+0
* ac/surface/gfx6: don't overallocate mipmapped HTILEMarek Olšák2018-05-241-2/+11
* radv: call nir_lower_io_to_temporaries for VS, GS, TES and FSSamuel Pitoiset2018-05-241-0/+10
* radv: call nir_split_var_copies() before nir_lower_var_copies()Samuel Pitoiset2018-05-241-0/+3
* ac: Use DPP for build_ddxy where possible.Bas Nieuwenhuizen2018-05-231-1/+15
* ac/surface/gfx6: Don't force a tile index for fmask.Bas Nieuwenhuizen2018-05-231-1/+1
* radv: fix computation of user sgprs for 32-bit pointersSamuel Pitoiset2018-05-221-1/+3
* radv: drop user_sgpr_info::sgpr_countSamuel Pitoiset2018-05-221-13/+11
* radv: add support for 32-bit pointers in user data SGPRsSamuel Pitoiset2018-05-224-21/+40
* radv: add set_loc_shader_ptr() helperSamuel Pitoiset2018-05-221-7/+13
* radv: allocate descriptor BOs in the 32-bit addr spaceSamuel Pitoiset2018-05-221-1/+2
* radv: allocate the upload BO in the 32-bit addr spaceSamuel Pitoiset2018-05-221-1/+2
* radv: set amdgpu-32bit-address-high-bits LLVM attributeSamuel Pitoiset2018-05-223-0/+8
* radv/winsys: allow to allocate BOs in the 32-bit addr spaceSamuel Pitoiset2018-05-222-1/+3
* radv/winsys: request high addressSamuel Pitoiset2018-05-221-4/+6
* radv: fix centroid interpolationSamuel Pitoiset2018-05-211-3/+0
* radv: Cleanup unused prime blit path.Bas Nieuwenhuizen2018-05-212-25/+0
* radv: Fix SRGB compute copies.Bas Nieuwenhuizen2018-05-212-0/+42
* radv: fix VK_EXT_descriptor_indexingChristoph Haag2018-05-201-1/+1
* ac/surface: Only align linear power of two fmt textures.Bas Nieuwenhuizen2018-05-201-2/+2
* amd/addrlib: Use defines in autotools build.Bas Nieuwenhuizen2018-05-201-0/+1
* radv: pass radv_nir_compiler_options directly to create_llvm_function()Samuel Pitoiset2018-05-181-4/+3
* radv: add radv_emit_shader_pointer() helperSamuel Pitoiset2018-05-173-13/+18
* radv: add some helpers for cleaning up radv_get_preamble_cs()Samuel Pitoiset2018-05-171-86/+128
* amd: remove support for LLVM 4.0Marek Olšák2018-05-176-210/+110
* radv: only declare the ESGS rings for pre GFX9 chipsSamuel Pitoiset2018-05-171-4/+10
* radv: allow to print GPU info with RADV_DEBUG=infoSamuel Pitoiset2018-05-172-0/+5
* radv: do not emit unnecessary ES output storesSamuel Pitoiset2018-05-171-3/+23
* radv: do not emit unnecessary GS output storesSamuel Pitoiset2018-05-171-0/+7
* radv: only pass the global BO list at submit time if enabledSamuel Pitoiset2018-05-171-2/+6
* radv: remove the radv_finishme() when compiling shadersSamuel Pitoiset2018-05-171-4/+0
* radv: remove radv_device::llvm_supports_spillSamuel Pitoiset2018-05-173-7/+1
* ac/llvm: use amdgcn.tbuffer.store instead of SI.tbuffer.store intrinsicDave Airlie2018-05-171-32/+60
* radv: add generated files to .gitignore(s)Dieter Nützel2018-05-151-0/+1
* radv: reduce the number of parameters export by the GS copy shaderSamuel Pitoiset2018-05-141-4/+3
* radv: scan the geometry shader output usage maskSamuel Pitoiset2018-05-142-0/+9
* radv: run the shader info pass before emitting the GS copy shaderSamuel Pitoiset2018-05-141-0/+2
* radv: check that layout isn't NULL in radv_nir_shader_info_pass()Samuel Pitoiset2018-05-141-1/+1
* radv: Disable texel buffers with A2 SNORM/SSCALED/SINT for pre-vega.Bas Nieuwenhuizen2018-05-141-0/+19
* radv: Fix up 2_10_10_10 alpha sign.Bas Nieuwenhuizen2018-05-144-13/+98
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