aboutsummaryrefslogtreecommitdiffstats
path: root/src/amd
Commit message (Collapse)AuthorAgeFilesLines
* ac: add 'const' qualifiers to the shader info passSamuel Pitoiset2018-01-122-8/+11
| | | | | | | For clarification purposes. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: remove unused ac_nir_compiler_options from gather_info_input_decl()Samuel Pitoiset2018-01-121-4/+2
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: don't emit unneeded vertex state.Dave Airlie2018-01-122-8/+49
| | | | | | | | | | | | | | | | | | If the number of instances hasn't changed and we've already emitted it, don't emit it again. If the vertex shader is the same and the first_instance, vertex_offset haven't changed don't emit them again. This increases the fps in GL_vs_VK -t 1 -m -api vk from around 40 to around 60 here, it may not impact anything else. Dieter also reported smoketest going from 1060->1200 fps. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Tested-by: Dieter Nützel <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: trim buffer load result (fixes dota2)Dave Airlie2018-01-121-1/+1
| | | | | | | | | | | Running dota2 since the below commit crashes with an llvm assert. Trim the vector like the other user. This possible could also be avoided by not padding inside the load vec3->vec4. Fixes: 41c36c4549 (amd/common: use ac_build_buffer_load() for emitting UBO loads) Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* meson: Use dependencies for nirDylan Baker2018-01-112-5/+6
| | | | | | | | | | | | | | | | | This creates two new internal dependencies, idep_nir_headers and idep_nir. The former encapsulates the generation of nir_opcodes.h and nir_builder_opcodes.h and adding src/compiler/nir as an include path. This ensures that any target that needs nir headers will have the includes and that the generated headers will be generated before the target is build. The second, idep_nir, includes the first and additionally links to libnir. This is intended to make it easier to avoid race conditions in the build when using nir, since the number of consumers for libnir and it's headers are quite high. Acked-by: Eric Engestrom <[email protected]> Signed-off-by: Dylan Baker <[email protected]>
* meson: Use include variablesDylan Baker2018-01-111-1/+1
| | | | | | | | These were added after adderlib was mesonified, but it still good to use them instead of open coding them. Acked-by: Eric Engestrom <[email protected]> Signed-off-by: Dylan Baker <[email protected]>
* meson: Use consistent styleDylan Baker2018-01-113-18/+33
| | | | | | | | | | | | | | | | | | | | Currently the meosn build has a mix of two styles: arg : [foo, ... bar], and arg : [ foo, ..., bar, ] For consistency let's pick one. I've picked the later style, which I think is more readable, and is more common in the mesa code base. v2: - fix commit message Acked-by: Eric Engestrom <[email protected]> Signed-off-by: Dylan Baker <[email protected]>
* ac/nir: fix translation of nir_op_fsign for doublesTimothy Arceri2018-01-121-7/+19
| | | | | | | | Without this we end up with the llvm error message: "Both operands to a binary operator are not of the same type!" Reviewed-by: Samuel Pitoiset <[email protected]>
* ac: add f64_0 to the llvm build contextTimothy Arceri2018-01-122-0/+2
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* ac/nir: fix translation of nir_op_frcp for doublesTimothy Arceri2018-01-121-1/+2
| | | | | | | | Without this we end up with the llvm error message: "Both operands to a binary operator are not of the same type!" Reviewed-by: Samuel Pitoiset <[email protected]>
* ac/nir: fix translation of nir_op_frsq for doublesTimothy Arceri2018-01-121-1/+2
| | | | | | | | Without this we end up with the llvm error message: "Both operands to a binary operator are not of the same type!" Reviewed-by: Samuel Pitoiset <[email protected]>
* ac: add f64_1 to the llvm build contextTimothy Arceri2018-01-122-0/+2
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: reset semaphores & fences on sync_file export.Bas Nieuwenhuizen2018-01-111-0/+16
| | | | | | | | | | | | | | | | | | Per spec: "Additionally, exporting a fence payload to a handle with copy transference has the same side effects on the source fence’s payload as executing a fence reset operation. If the fence was using a temporarily imported payload, the fence’s prior permanent payload will be restored." And similar for semaphores: "Additionally, exporting a semaphore payload to a handle with copy transference has the same side effects on the source semaphore’s payload as executing a semaphore wait operation. If the semaphore was using a temporarily imported payload, the semaphore’s prior permanent payload will be restored." Fixes: 42bc25a79c "radv: Advertise sync fd import and export." Reviewed-by: Dave Airlie <[email protected]>
* ac: add load_patch_vertices_in() to the abiTimothy Arceri2018-01-112-1/+12
| | | | | | | | | | | | | Fixes the follow test for radeonsi nir: tests/spec/arb_tessellation_shader/execution/quads.shader_test Also stops 8 other tests from crashing, they now just fail e.g. tcs-output-array-float-index-rd-after-barrier.shader_test Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* ac/nir: Sanitize location_frac for local variables.Bas Nieuwenhuizen2018-01-111-0/+1
| | | | | | | | If they were promoted from inputs/outputs, they could have a non-zero value left over, which messed with our store handling. Fixes: 06f05040eb "radv: Link shaders." Reviewed-by: Timothy Arceri <[email protected]>
* amd/common: use ac_build_buffer_load() for emitting UBO loadsSamuel Pitoiset2018-01-101-14/+3
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: import get_{load,store}_intr_attribs() from RadeonSISamuel Pitoiset2018-01-102-10/+20
| | | | | | | v2: move those helpers to the header and use static inline Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> (v1)
* radv: Remove some typos.Bas Nieuwenhuizen2018-01-102-4/+4
| | | | Trivial.
* radv: Implement VK_EXT_discard_rectangles.Bas Nieuwenhuizen2018-01-105-6/+110
| | | | | | | | Tested with a modified deferred demo and no regressions in a 1.0.2 mustpass run. Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Add mapping between dynamic state mask and external enum.Bas Nieuwenhuizen2018-01-103-38/+79
| | | | | | | | | The EXT values are really large, e.g. VK_DYNAMIC_STATE_DISCARD_RECTANGLE_EXT = 1000099000, so 1 << value is not going to fit into a 32-bit mask. Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* amd/common: bump the number of available user SGPRS to 32 on GFX9Samuel Pitoiset2018-01-101-1/+3
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: remove radv_pipeline_layout::push_constant_stages fieldSamuel Pitoiset2018-01-102-3/+0
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: do not rely on the pipeline for the push constants logicSamuel Pitoiset2018-01-103-9/+9
| | | | | | | | It makes more sense to rely on nir_intrinsic_load_push_constant instead of the pipeline layout. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv/gfx9: calculate the number of ES VGPRs for merged shadersSamuel Pitoiset2018-01-101-3/+10
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv/gfx9: enable LDS for GS only if the ES type is TESSamuel Pitoiset2018-01-101-1/+2
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: determine the ES type (VS or TES) for the GS on GFX9Samuel Pitoiset2018-01-102-0/+9
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: rework emit_barrier() to not segfault on radeonsiTimothy Arceri2018-01-091-9/+8
| | | | | | | | nir_to_llvm_context will always be NULL for radeonsi so we need work around this. Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* ac: add load_tess_level() to the abiTimothy Arceri2018-01-092-0/+10
| | | | | | | | | | | | | | | | Fixes the following piglit tests in radeonsi: vs-tcs-tes-tessinner-tessouter-inputs-quads.shader_test vs-tcs-tes-tessinner-tessouter-inputs-tris.shader_test vs-tes-tessinner-tessouter-inputs-quads.shader_test vs-tes-tessinner-tessouter-inputs-tris.shader_test v2: make use of si_shader_io_get_unique_index_patch() via the helper in the previous patch rather than shader_io_get_unique_index() Reviewed-by: Nicolai Hähnle <[email protected]> (v1) Reviewed-by: Marek Olšák <[email protected]>
* radv: get InstanceID from VGPR1 (or VGPR2 for tess) instead of VGPR3Samuel Pitoiset2018-01-081-8/+24
| | | | | | | | | VGPR1 = InstanceID / StepRate0; // StepRate0 can be set to 1 Ported from RadeonSI. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: avoid PS partial flushes when viewports/scissors don't changeSamuel Pitoiset2018-01-081-6/+33
| | | | | | | | | | | | | For Vega10 and Raven that need a special workaround for the scissor bug. This seems to give a minor boost for Talos and Dota 2, at least. To reduce the cost of memcmp, the driver checks if it's really useful to do the comparison. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: add has_scissor_bug for Vega10 and RavenSamuel Pitoiset2018-01-083-2/+6
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv/gfx9: do not load VGPR1 when GS uses points or linesSamuel Pitoiset2018-01-081-1/+3
| | | | | | | | VGPR1 is only needed for topology that needs 3 offsets like triangles or quads. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: make shader BOs read-only for the GPUSamuel Pitoiset2018-01-083-1/+7
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: make descriptor BOs read-only for the GPUSamuel Pitoiset2018-01-082-3/+7
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: make the indirect GFX config BO read-only for the GPUSamuel Pitoiset2018-01-081-1/+2
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv/winsys: make IBs read-only for the GPUSamuel Pitoiset2018-01-081-6/+11
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv/winsys: add RADEON_FLAG_READ_ONLYSamuel Pitoiset2018-01-082-1/+4
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv/winsys: rework radv_amdgpu_bo_va_op()Samuel Pitoiset2018-01-081-17/+23
| | | | | | | Needed for the following commit. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: add ac_build_fmin/fmax helpersMarek Olšák2018-01-062-15/+22
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radv: remove unused radv_color_buffer_info::cb_clear_valueXSamuel Pitoiset2018-01-051-2/+0
| | | | | | | Found by inspection. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas nieuwenhuizen <[email protected]>
* radv: enable denorms for 64-bit and 16-bit floatsSamuel Pitoiset2018-01-051-0/+14
| | | | | | | | | | | Similar to RadeonSI. This fixes: dEQP-VK.image.texel_view_compatible.graphic.basic.attachment_read.bc*r16g16b16a16_sfloat dEQP-VK.image.extended_usage_bit.attachment_write.r16_sfloat Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: correctly detect if we need ring buffersSamuel Pitoiset2018-01-051-7/+9
| | | | | | | | | | | | When allocate_user_sgprs() was called, ctx->stage was actually unset and 0 is for the vertex shader. This doesn't change anything for now because of the spill support thing. Though, the number of user SGPRs has to be fixed for merged shaders on GFX9. It was broken before anyway. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* amd/common: use ac_image_load when lod is zeroSamuel Pitoiset2018-01-051-1/+3
| | | | | | | | | This might decrease VGPR spilling, because we no longer have to use v4i32 for 2D fetches when level == 0. We now use v2i32 for those cases. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radv: limit the scissor bug workaround to Vega 10 and RavenSamuel Pitoiset2018-01-051-1/+6
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: rework ac_llvm_extract_elem()Timothy Arceri2018-01-051-3/+3
| | | | | | | Simplifies the logic a little and asserts index is 0. Suggested-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac/radeonsi: add load_tess_coord() to the abiTimothy Arceri2018-01-052-7/+17
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac/radeonsi: add tcs_rel_ids to the abiTimothy Arceri2018-01-052-8/+8
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac: add {tcs,tes}_patch_id to the abiTimothy Arceri2018-01-052-8/+8
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac: move some helpers to ac_llvm_build.cTimothy Arceri2018-01-053-40/+50
| | | | | | | We will call these from the radeonsi NIR backend. Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac: add store_tcs_outputs() to the abiTimothy Arceri2018-01-052-24/+51
| | | | | Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-26 19:13:53 +0000