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* radv: fixup IA_MULTI_VGT_PARAM handling.Dave Airlie2017-02-144-31/+105
| | | | | | | | | This ports the remains of the workarounds from radeonsi for the non-TESS cases. It should provide equivalent workarounds for hawaii and bonarie. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: fix warning since using common gs emit codeDave Airlie2017-02-141-1/+0
| | | | Signed-off-by: Dave Airlie <[email protected]>
* radv: adopt some init config workarounds from radeonsi.Dave Airlie2017-02-151-2/+9
| | | | | | | | | Just one bonaire fix. Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Cc: "13.0 17.0" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: re-enable init gfx state on CIK.Dave Airlie2017-02-151-2/+1
| | | | | | | | | Once the color alignment was fixed this works fine now. Tested-by: Kai Wasserbäch <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: align the initial state command buffer.Dave Airlie2017-02-151-0/+7
| | | | | | | | | This just adds the padding to align this to an 8 dword boundary. Tested-by: Kai Wasserbäch <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: fix cik macroModeIndex.Dave Airlie2017-02-151-0/+14
| | | | | | | | | | This just a CIK fix ported from radeonsi. Tested-by: Kai Wasserbäch <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Cc: "13.0 17.0" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: change base aligmment for allocated memory.Dave Airlie2017-02-151-1/+1
| | | | | | | | | | | | | | | On some CIK (Hawaii) this needs to be at least 64k, I'm not 100% sure it doesn't need to be 128k. This was causing fast clear eliminate to overwrite the previous buffer, which since my gfx init code, was the indirect buffer. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=99692 Tested-by: Kai Wasserbäch <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Cc: "13.0 17.0" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/ac: use sendmsg emission interface.Dave Airlie2017-02-141-26/+4
| | | | | | | This uses the common code to emit the correct intrinsic. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeon/ac/llvm: add support for sendmsg emissionDave Airlie2017-02-142-0/+25
| | | | | | | | | This lets us use the new intrinsic on the correct version of llvm. Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: disable gfx init on CIK for nowDave Airlie2017-02-141-1/+2
| | | | | | | Luzipher on irc report this hangs his Hawaii, disable for now until I get time to debug. Signed-off-by: Dave Airlie <[email protected]>
* radv/ac: use common interp code for new intrinsicsDave Airlie2017-02-141-20/+41
| | | | | | | | This uses the common fs interp code to use the new llvm intrinsics so llvm can drop the old ones. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: use indirect buffer for initial gfx state.Dave Airlie2017-02-134-1/+62
| | | | | | | | | | This puts the common gfx state for the device into an indirect buffer, and just calls out to it, on CIK and above. This is taken from what radeonsi does. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: start splitting init config upDave Airlie2017-02-131-8/+20
| | | | | | | | This is just prep work for the following patch to use a common gfx init indirect buffer. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: don't pass physical device to si_init_ fns.Dave Airlie2017-02-133-11/+9
| | | | | | | This is just a trivial cleanup. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: detect command buffers that do no work and drop them (v2)Dave Airlie2017-02-135-8/+27
| | | | | | | | | | | | | | If a buffer is just full of flushes we flush things on command buffer submission, so don't bother submitting these. This will reduce some CPU overhead on dota2, which submits a fair few command streams that don't end up drawing anything. v2: reorganise loop to count first then malloc, rename some vars (Bas) Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: Fix radv_GetPhysicalDeviceQueueFamilyProperties2KHR.Bas Nieuwenhuizen2017-02-131-9/+36
| | | | | | | The struct have different size, so the arrays have different stride. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: reduce CPU overhead merging bo lists.Dave Airlie2017-02-121-1/+11
| | | | | | | | | | | | Just noticed we do a fair bit of unneeded searching here. Since we know that the buffers in a CS are unique already, the first time we get any buffers, we can just memcpy those into place, and when we are searching for subsequent CSes, we only have to search up until where the previous unique buffers were. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: handle queue submission with no cs but semaphoresDave Airlie2017-02-091-2/+20
| | | | | | | | | It's legal to submit just semaphores with no command streams, this patch fixes this case by emitting the empty cs, it also handles the fence emission for this case better. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: Add CPU color packing for VK_FORMAT_A2B10G10R10_UNORM_PACK32.Bas Nieuwenhuizen2017-02-081-2/+6
| | | | | | | | | For allowing fast color clears in the main render targets of dota2. [airlied: fix clear_vals[1] as suggested by Andres. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: handle dcc in explicit image resolve path. (v2)Dave Airlie2017-02-071-3/+8
| | | | | | | | We need to initialize dcc like we do in the subpass path. v2: fix initial/final layouts Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: Enable fast clears by default.Bas Nieuwenhuizen2017-02-073-4/+4
| | | | | | | | Works for me on dota2 and talos now. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Andres Rodriguez <[email protected]>
* radv: pass FMASK alignment to applicationDave Airlie2017-02-071-0/+1
| | | | | | | | As was done for dcc and cmask. Cc: "17.0" <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: Pass DCC alignment to application.Bas Nieuwenhuizen2017-02-071-0/+1
| | | | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Cc: "17.0" <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Andres Rodriguez <[email protected]>
* radv: Pass CMASK alignment to application.Bas Nieuwenhuizen2017-02-071-0/+1
| | | | | | | | | | CMASK alignment can be greater than image data alignment, so pass it to the app so that it knows what alignment to backing memory should have. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Cc: <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv/ac: avoid the fmask path when doing txs.Dave Airlie2017-02-061-1/+2
| | | | | | | | This fixes the vulkan samples deferredmultisampling test. Cc: "17.0" <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeon/ac: move common llvm build functions to a separate file.Dave Airlie2017-02-076-851/+933
| | | | | | | | | Suggested by Marek. Reviewed-by: Marek Olšák <[email protected]> Acked-by: Nicolai Hähnle <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: fix shared memory load/stores.Dave Airlie2017-02-031-0/+7
| | | | | | | | | | | If we have an indirect index here we need to scale it by attribute slots e.g. is this is vec2[256] then we get an indir_index in the 0.255 range but the vec2 are aligned inside vec4 slots. So scale the indir index, then extract the channels. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Cc: "17.0" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/ac: correctly size shared memory usage.Dave Airlie2017-02-031-1/+1
| | | | | | | | | | We count the number of slots used, but slots are vec4 sized, so we have to scale by 16 not 4. Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Cc: "17.0" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: fix compute shared memory stores since 64-bit.Dave Airlie2017-02-031-1/+3
| | | | | | | | | | | These regressed and caused doom to stop loading. Fixes: 03724af26 radv/ac: Implement Float64 load/store var. Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/ac: move to using shared emit_ddxy code.Dave Airlie2017-02-031-68/+7
| | | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeonsi/ac: move most of emit_ddxy to shared code.Dave Airlie2017-02-032-0/+86
| | | | | | | | We can reuse this in radv. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/ac: use shared thread id codeDave Airlie2017-02-031-42/+2
| | | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeonsi/ac: move get thread id to shared code.Dave Airlie2017-02-032-1/+53
| | | | | | | | radv will use this. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/ac: migrate to using shared code for some load/store stuff.Dave Airlie2017-02-031-103/+28
| | | | | | | | This migrates to the code shared with radeonsi. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeonsi/ac: move tbuffer store and buffer load to shared code.Dave Airlie2017-02-032-1/+198
| | | | | | | | These are all reuseable by radv. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeonsi/ac: move a bunch of load/store related things to common code.Dave Airlie2017-02-032-0/+87
| | | | | | | | | These are all shareable with radv, so start migrating them to the common code. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* android: fix llvm, elf dependencies for M, N releasesMauro Rossi2017-02-011-1/+1
| | | | | | | | These changes set the correct llvm version and elf include path which differ for Marshmallow and Nougat Cc: "17.0" <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* radv: handle VK_QUEUE_FAMILY_IGNORED in image transitions (v3)Dave Airlie2017-02-024-12/+15
| | | | | | | | | | | | | The CTS tests at least are using this, and we were totally ignoring it. This hopefully fixes the bouncing multisample CTS tests. v2: get family mask in ignored case from command buffer. v3: only change things in one place, use logic from Bas. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/ac: handle clip/cull distance sizing in geometry shader outputsDave Airlie2017-02-021-8/+10
| | | | | | | | | | | Otherwise we were writing these as 4 components, and things went bad. Fixes (the remaining): dEQP-VK.clipping.user_defined.*.vert_geom.* Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/ac: add const_index to fetch index for gs inputsDave Airlie2017-02-021-1/+1
| | | | | | | | | | | | This fixes clip distance fetches as they are single item loads with a const_index like float[1]. Fixes: dEQP-VK.clipping.user_defined.*.vert_geom.[0-6] Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radeonsi/ac: move frag interp emission code to shared llvm code.Dave Airlie2017-02-022-0/+85
| | | | | | | | This code should be used in radv, so move it to a shared location in advance of doing that. Reviewed-by: Nicolai Hähnle <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: Enable VK_KHR_shader_draw_parameters.Bas Nieuwenhuizen2017-02-012-0/+5
| | | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* radv: Pass draw index to shader.Bas Nieuwenhuizen2017-02-011-5/+9
| | | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* radv/ac: Add draw index support.Bas Nieuwenhuizen2017-02-011-2/+8
| | | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* radv: Enable Float64 support.Bas Nieuwenhuizen2017-02-012-1/+2
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv/ac: Implement Float64 SSBO loads.Bas Nieuwenhuizen2017-02-011-26/+49
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv/ac: Implement Float64 UBO loads.Bas Nieuwenhuizen2017-02-011-2/+6
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv/ac: Implement Float64 load/store var.Bas Nieuwenhuizen2017-02-011-53/+48
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv/ac: Implement Float64 SSBO stores.Bas Nieuwenhuizen2017-02-011-3/+14
| | | | | | | No f16 support as I'm not quite sure about alignment yet. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv/ac: Add core Float64 support.Bas Nieuwenhuizen2017-02-011-44/+129
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
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