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* radv: use ac_gpu_infoNicolai Hähnle2017-06-055-229/+13
| | | | Reviewed-by: Dave Airlie <[email protected]>
* radv: remove radeon_info::nameNicolai Hähnle2017-06-053-30/+27
| | | | Reviewed-by: Dave Airlie <[email protected]>
* radv: use ac_surface data structuresNicolai Hähnle2017-06-057-153/+80
| | | | | | | | | This is mostly mechanical changes of renaming types and introducing "legacy" everywhere. It doesn't use the ac_surface computation functions yet. Reviewed-by: Dave Airlie <[email protected]>
* radv: rename radeon_surf::bo_{size,alignment} to surf_{size,alignment}Nicolai Hähnle2017-06-053-12/+13
| | | | | | To match radeonsi / ac_surface. Reviewed-by: Dave Airlie <[email protected]>
* radv: remove unused RADEON_SURF_HAS_SBUFFER_MIPTREENicolai Hähnle2017-06-052-3/+1
| | | | Reviewed-by: Dave Airlie <[email protected]>
* radv: remove radeon_surf_level::nblk_zNicolai Hähnle2017-06-053-6/+1
| | | | | | | We're not using thick tiling modes, so we can just derive the value ourselves. Reviewed-by: Dave Airlie <[email protected]>
* radv: remove radeon_surf_level::dcc_enabledNicolai Hähnle2017-06-055-6/+7
| | | | | | Like radeonsi; replace with radeon_surf::num_dcc_levels. Reviewed-by: Dave Airlie <[email protected]>
* radv: remove radeon_surf_level::pitch_bytesNicolai Hähnle2017-06-055-13/+3
| | | | | | | Like radeonsi. This saves memory, and the information can easily be recomputed on the fly where necessary. Reviewed-by: Dave Airlie <[email protected]>
* radv: add surface helper variable in radv_GetImageSubresourceLayoutNicolai Hähnle2017-06-051-6/+7
| | | | Reviewed-by: Dave Airlie <[email protected]>
* radv: fewer than 8 RBs are possibleNicolai Hähnle2017-06-051-2/+0
| | | | | | This fixes the subsequent assertion on Bonaire. Reviewed-by: Dave Airlie <[email protected]>
* radv: add external memory support.Dave Airlie2017-06-053-14/+183
| | | | | | | | | | | | | | | | | | | | | | | This adds support for exporting 2D images, to an opaque fd. This implements the: VK_KHX_external_memory_capabilities VK_KHX_external_memory VK_KHX_external_memory_fd extensions. These are used by SteamVR, we should work with anv to decide if we should ship these under an env var or something. v2 (Bas): - Don't expose the semaphore ext without implementing it. - Only export the capabilities ext as instance ext. - Implement radv_GetPhysicalDeviceExternalBufferPropertiesKHX. Signed-off-by: Dave Airlie <[email protected]> Signed-off-by: Bas Nieuwenhuizen <[email protected]>
* radv: Add VkPhysicalDeviceIDProperties support.Bas Nieuwenhuizen2017-06-052-2/+23
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Add support for external queue family.Bas Nieuwenhuizen2017-06-051-1/+6
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv/formats: reverse how the image format properties KHR2 is handledDave Airlie2017-06-051-30/+46
| | | | | | | This just aligns with how anv does it. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: Dirty all descriptors sets when changing the pipeline.Bas Nieuwenhuizen2017-06-032-8/+14
| | | | | | | | | Sets could have been ignored during previous descriptor set flush due to the shader not using them and therefore no SGPR being assigned. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Fixes: ae61ddabe8c "radv: move userdata sgpr ownership to compiler side."
* radv: Set both compute and graphics SGPRS on descriptor set flush.Bas Nieuwenhuizen2017-06-031-50/+50
| | | | | | | | | | We clear the descriptors_dirty array afterwards, so the SGPRs for the other pipeline don't get updated on the flush for that other draw/dispatch, so we have to make sure we do it immediately. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Fixes: ae61ddabe8c "radv: move userdata sgpr ownership to compiler side."
* radv: realign cp dma code with radeonsiDave Airlie2017-06-021-86/+70
| | | | | | | | This reworks this code to be like radeonsi, which will make it easier to add GFX9 support to it in the future. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: bump some base addresses to 64-bits.Dave Airlie2017-06-021-9/+9
| | | | | | | | For GFX9 these will be needed to be 64-bit, so bump them early, to avoid it causing any wierdness later. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: factor out eop event writing code. (v2)Dave Airlie2017-06-024-65/+82
| | | | | | | | | | | | | | In prep for GFX9 refactor some of the eop event writing code out. This changes behaviour, but aligns with what radeonsi does, it does double emits on CIK/VI, whereas previously it only did this on CIK. v2: bump the size checks. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: factor out si_emit_wait_fence code.Dave Airlie2017-06-024-22/+20
| | | | | | | This code was in a few places, consolidate into one. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: Revert HTILE reset word to 0xFFFFFFFF.Bas Nieuwenhuizen2017-05-311-1/+1
| | | | | | | | 0x30f regressed mad max. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Acked-by: Dave Airlie <[email protected]> Fixes: df91abfe5af "radv: Use correct clear words for HTILE."
* radv: Reserve space for descriptor and push constant user SGPR setting.Bas Nieuwenhuizen2017-05-291-0/+8
| | | | | | | | flush_compute_state doesn't reserve a large chunk, so these need their own reservation. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Fixes: f4e499ec791 "radv: add initial non-conformant radv vulkan driver"
* radv: automake: list shared libraries after the static onesEmil Velikov2017-05-291-19/+16
| | | | | | | | | | Analogous to previous commit - the compiler can discard xcb + wayland libs, since there is no user (the static libraries) before it on the command line. Cc: [email protected] Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Eduardo Lima Mitev <[email protected]>
* radv: Also signal fence if vkAcquireNextImageKHR returns VK_SUBOPTIMAL_KHR.Bas Nieuwenhuizen2017-05-291-1/+1
| | | | | | | It is a successful return. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Add compute HTILE fast clear.Bas Nieuwenhuizen2017-05-221-1/+93
| | | | | | | | | Not really what the fast depth clear does, no matter whether you use EXPCLEAR or not. Seems the fast clear using the DB HW always touches the main buffer. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Use correct clear words for HTILE.Bas Nieuwenhuizen2017-05-221-4/+13
| | | | | | | | | | Did some RE'ing what several HTILE words give when read from a descriptor with HTILE compression enabled. Seems to align with -pro usage for D16 too. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Add queue masks for htile usage determination.Bas Nieuwenhuizen2017-05-224-20/+41
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Specify semantics of HTILE layout helpers.Bas Nieuwenhuizen2017-05-223-3/+20
| | | | | | | And correct implementation to specify only what we support. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Don't use a separate can_expclear.Bas Nieuwenhuizen2017-05-225-40/+11
| | | | | | | We never use EXPCLEAR clears. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* configure: check once for DRI3 dependenciesEmil Velikov2017-05-191-2/+1
| | | | | | | | | | | | | | | | Currently we are having the XCB_DRI3 dependencies duplicated, partially. Just do a once-off check and add all of the respective CFLAGS/LIBS where needed. As a nice side effect this helps us solve a couple of FIXMEs. DRI3 is not a thing w/o X11 so disable it in such cases. Cc: [email protected] Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* radv: Save descriptor set even if vertex buffers are not saved.Bas Nieuwenhuizen2017-05-131-2/+3
| | | | | | | | Totally independent. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Fixes: 0e6d532d327 "radv/meta: add support for save/restore meta without vertex data."
* radv: handle fragment shader srgb resolve pass betterDave Airlie2017-05-112-11/+38
| | | | | | | | | | | Bas pointed out the fs key doesn't take srgb into account, since there is just one srgb variant, just create a separate pipeline for it. This also uses dest format to be more consistent on when srgb matters. Fixes: 69136f4e633 "radv/meta: add resolve pass using fragment/vertex shaders" Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: always free nir shaders from modules on stackGrazvydas Ignotas2017-05-102-8/+4
| | | | | | | | | valgrind reports them as leaked, and I could not find anything making a copy of the nir pointer. Also, radv_device_init_meta_blit_color() is already freeing them unconditionally like this. Signed-off-by: Grazvydas Ignotas <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* nir: Embed the shader_info in the nir_shader againJason Ekstrand2017-05-0911-92/+92
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit e1af20f18a86f52a9640faf2d4ff8a71b0a4fa9b changed the shader_info from being embedded into being just a pointer. The idea was that sharing the shader_info between NIR and GLSL would be easier if it were a pointer pointing to the same shader_info struct. This, however, has caused a few problems: 1) There are many things which generate NIR without GLSL. This means we have to support both NIR shaders which come from GLSL and ones that don't and need to have an info elsewhere. 2) The solution to (1) raises all sorts of ownership issues which have to be resolved with ralloc_parent checks. 3) Ever since 00620782c92100d77c660f9783504c6d80fa1d58, we've been using nir_gather_info to fill out the final shader_info. Thanks to cloning and the above ownership issues, the nir_shader::info may not point back to the gl_shader anymore and so we have to do a copy of the shader_info from NIR back to GLSL anyway. All of these issues go away if we just embed the shader_info in the nir_shader. There's a little downside of having to copy it back after calling nir_gather_info but, as explained above, we have to do that anyway. Acked-by: Timothy Arceri <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* radv: fix regression in blit2d push constant change.Dave Airlie2017-05-081-1/+1
| | | | | | | | | These were being fed to the shader as floats via the vertex path, so also push them as floats here. This fixes missing overlay in Sascha Willems demos. Signed-off-by: Dave Airlie <[email protected]>
* radv/meta: cleanup some unused code pathDave Airlie2017-05-082-34/+1
| | | | | | | | After moving everything to using push constants, these paths are no longer needed. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/meta: port blit to using push constantsDave Airlie2017-05-081-100/+65
| | | | | | | Remove use of vertex buffer. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/meta: move blit2d to using push constantsDave Airlie2017-05-082-75/+59
| | | | | | | This allows us to drop the vertex buffer. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/meta: move clear color to using push constantsDave Airlie2017-05-082-130/+78
| | | | | | | | | | | | The color clear value is uniform and needs only to be emitted from the frag shader, so just push it down via a push constant, and remove the vertex buffer completely. The depth clear value needs to be emitted from the vertex shader, but is only a single value. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/meta: use novertex save path for resolve pass.Dave Airlie2017-05-082-2/+2
| | | | | | | This was missing in the original change. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: set base/ranges for push constant loads.Dave Airlie2017-05-086-0/+26
| | | | | | | | | This isn't necessary yet but I'd like to use the range in some future patches. [airlied: add new resolve pass] Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: drop resolve hack workaroundsDave Airlie2017-05-073-104/+1
| | | | | | | | | This drops the resolve workarounds that change an image tiling mode behinds it's back, this is horrible and breaks the image_view->image relationship. Remove all this. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/meta: select resolve pathsDave Airlie2017-05-071-8/+50
| | | | | | | | | | | | | | | | There are 3 resolve paths, the fastest being the hw resolver but it has restriction on tile modes and can't do subresolves, the compute resolver is next speed wise, but can't handle DCC destinations, the fragment resolver handles that case. This will end up with a slow down as currently we hack the hw resolver paths when they shouldn't work, but we shouldn't keep doing that. The next patch removes the hacks. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/meta: add resolve pass using fragment/vertex shadersDave Airlie2017-05-076-2/+699
| | | | | | | | | | | In order to resolve into DCC enabled dests we need to use the fragment shader. This reuses the code from the compute path and implements a resolve path in vertex/fragment shader. This code isn't used until later. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: add subpass resolve compute pathDave Airlie2017-05-072-0/+94
| | | | | | | | | | This adds a path to allow compute resolves to be used for subpass resolves. This isn't used yet, but will be later. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/resolve: split resolve emission out for computeDave Airlie2017-05-071-63/+78
| | | | | | | This will allow to add a subpass compute resolve path. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/meta: split out core part of resolve shaderDave Airlie2017-05-073-113/+140
| | | | | | | | I want to reuse the same code for the fragment shader version of the resolve shaders. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/meta: add srgb conversion to end of resolve shader.Dave Airlie2017-05-073-5/+61
| | | | | | | | | | | If we are resolving into an srgb dest, we need to convert to linear so the store does the conversion back. This should fix some wierdness seen when we subresolves hit the compute path. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: set PERF_MOD in sample state like radeonsi.Dave Airlie2017-05-071-1/+2
| | | | | | | This just aligns the code with radeonsi. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: apply the tess+GS hang workaround to Polaris12 as wellDave Airlie2017-05-071-1/+2
| | | | | | | | | As I pointed out for radeonsi, and AMD confirmed, so fix this in radv as well. Cc: "17.1" <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
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