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* radv: Disable primitive restart for non-indexed drawsAlex Smith2017-04-122-22/+34
| | | | | | | | | | | | | | | | According to the Vulkan spec, VkPipelineInputAssemblyStateCreateInfo's primitiveRestartEnable flag should only apply to indexed draws, however it was being enabled regardless of the type of draw. This could cause problems for non-indexed draws with >=65535 vertices if the previous indexed draw used 16-bit indices. Fixes corruption of the credits text in Mad Max. v2: Reset primitive restart state after executing a secondary command buffer. Signed-off-by: Alex Smith <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: Hash the immutable samplers.Bas Nieuwenhuizen2017-04-121-0/+3
| | | | | | | Since the shader code can include them. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Use an offset instead of pointers for immutable samplers.Bas Nieuwenhuizen2017-04-123-22/+32
| | | | | | | Makes more sense when we hash the layout for the pipeline cache. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Stop shadowing the result in radv_GetQueryPoolResults.Bas Nieuwenhuizen2017-04-121-4/+4
| | | | | | | The outer result was referred to, which meant bugs. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Return VK_NOT_READY if the query results are not available.Bas Nieuwenhuizen2017-04-121-0/+6
| | | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Fixes: 8475a14302e ("radv: Implement pipeline statistics queries.") Reviewed-by: Fredrik Höglund <[email protected]>
* radv: Set query availability bit even if we don't wait.Bas Nieuwenhuizen2017-04-121-3/+4
| | | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Fixes: 8475a14302e ("radv: Implement pipeline statistics queries.") Reviewed-by: Fredrik Höglund <[email protected]>
* radv: Implement pipeline statistics queries.Bas Nieuwenhuizen2017-04-113-27/+394
| | | | | | | | | | | The devil is in the shader again, otherwise this is fairly straightforward. The CTS contains no pipeline statistics copy to buffer testcases, so I did a basic smoketest. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Let count be dynamic in radv_break_on_count.Bas Nieuwenhuizen2017-04-111-3/+3
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Rename query pipeline/set layout.Bas Nieuwenhuizen2017-04-112-13/+13
| | | | | | | For using them with both occlusion and pipeline statistics queries. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Use VK_WHOLE_SIZE for the query buffer bindings.Bas Nieuwenhuizen2017-04-111-2/+2
| | | | | | | | The buffer sizes are specified just a few lines earlier, so don't repeat ourselves. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Use a shader for occlusion CmdCopyQueryPoolResults.Bas Nieuwenhuizen2017-04-111-74/+64
| | | | | | | | | | | | | | | | | | Use the new occlusion query copy shader. We don't use the shader for the waiting as a polling loop ineracts badly with having caching enabled. I noticed on my GPU (Tonga) that the values are written out in order, so I just use a WAIT_REG_MEM on the last value. If it turns out other chips don't do that we may need to look a bit more into this. Having 8 WAIT_REG_MEM packets per query doesn't sound ideal. This also restricts the availability word in the pool to timestamp queries only, as occlusion queries don't use it, and pipeline statistic queries likely won't either. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Add occlusion query shader.Bas Nieuwenhuizen2017-04-114-0/+435
| | | | | | | | | Adds a shader for writing occlusion query results to a buffer, as the CP packet isn't support on SI or secondary buffers, and doesn't handle the availability bit (or partial results) nor truncation to 32-bit. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: don't call radeon_check_space in radv_BindDescriptorSetsFredrik Höglund2017-04-071-5/+0
| | | | | | | | This appears to be a leftover from an earlier version of this function. Nothing is emitted into the CS. Signed-off-by: Fredrik Höglund <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: implement VK_KHR_descriptor_update_templateFredrik Höglund2017-04-075-0/+231
| | | | | | | | | | | All offsets and strides are precomputed by radv_CreateDescriptorUpdateTemplateKHR and stored in the template. v2: Move the new struct declarations from radv_descriptor_set.h to radv_private.h (Bas) Signed-off-by: Fredrik Höglund <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: implement VK_KHR_push_descriptorFredrik Höglund2017-04-076-2/+128
| | | | | Signed-off-by: Fredrik Höglund <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: replace an assertion with a conditionalFredrik Höglund2017-04-071-3/+3
| | | | | | | | | | | | | | | | Replace the !binding_layout->immutable_samplers assertion in radv_update_descriptor_sets with a conditional. The Vulkan specification does not say that it is illegal to update a sampler descriptor when it is immutable; only that pImageInfo is ignored. This change is also needed for push descriptors, because valid descriptors must be pushed for all bindings accessed by shaders, including immutable sampler descriptors. Signed-off-by: Fredrik Höglund <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: refactor radv_UpdateDescriptorSetsFredrik Höglund2017-04-072-12/+52
| | | | | | | | | | | | | Move the implementation into a separate function that takes a cmd_buffer and a dstSetOverride parameter. When cmd_buffer is not NULL, radv_update_descriptor_sets calls cs_add_buffer directly instead of updating the buffer list. This will be used to implement VK_KHR_push_descriptor. Signed-off-by: Fredrik Höglund <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: Increase descriptor limits.Bas Nieuwenhuizen2017-04-041-14/+14
| | | | | | | | We supported more generally. Decreased the dynamic buffers though, as we only support 16 for uniform+storage. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Acked-by: Dave Airlie <[email protected]>
* radv: Rework guard band calculation.Bas Nieuwenhuizen2017-04-031-40/+15
| | | | | | | | | | | | | | | | | | We want the guardband_x/y to be the largerst scalars such that each viewport scaled by that amount is still a subrange of [-32767, 32767]. The old code has a couple of issues: 1) It used scissor instead of viewport_scissor, potentially taking into account a viewport that is too small and therefore selecting a scale that is too large. 2) Merging the viewports isn't ideal, as for example viewports with boundaries [0,1] and [1000, 1001] would allow a guardband scale of ~30k, while their union [0, 1001] only allows a scale of ~32. The new code just determines the guardband per viewport and takes the minimum. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Acked-by: Dave Airlie <[email protected]>
* radv: Enable VK_KHR_incremental_present.Bas Nieuwenhuizen2017-04-033-1/+15
| | | | | | | Just enabling the driver-independent implementation that Jason did. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* vulkan/wsi: Plumb present regions through the common codeJason Ekstrand2017-04-031-1/+2
| | | | | | Reviewed-by: Lionel Landwerlin <[email protected]> Reviewed-by: Daniel Stone <[email protected]> Acked-by: Dave Airlie <[email protected]>
* radv: overhaul fragment shader sample positions.Dave Airlie2017-04-043-36/+67
| | | | | | | | | | | | | | | | | | The current code was broken, and I decided to redesign it instead. This puts the sample positions for all samples into the queue constant descriptor buffer after all the spill/ring descriptors. It then uses a single offset register to point how far into the samples the samples for num_samples are. This saves one user sgpr and means we only generate the sample position data in the rare single case where we need it currently. This doesn't fix the failing CTS tests without the followup fix. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: fix order of the guardband register emission.Dave Airlie2017-04-021-2/+2
| | | | | | | | | y is vert, x is horiz. Noticed in visual inspection compared to radeonsi. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: enable tessellation shaders.Dave Airlie2017-04-012-9/+10
| | | | | | | | This enables tessellation shaders and sets some values for the maximums. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: add ia_multi_vgt_param tessellation support.Dave Airlie2017-04-011-2/+30
| | | | | | | This just ports the relevant radeonsi pieces. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/cmd: emit tessellation state.Dave Airlie2017-04-011-4/+109
| | | | | | | | | This emits the tessellation shaders and state to the command stream. It contains the logic to emit the LS/HS shaders. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/pipeline: handle tessellation shader compilationDave Airlie2017-04-011-0/+142
| | | | | | | | | | | | | | So tess shaders have some circular dependencies, TCS needs the TES primitive mode TES needs the TCS vertices out This builds the nir for each shader first to get the info, executes a tes specific nir pass, then builds the LLVM shaders. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/pipeline: start calculating tess stage.Dave Airlie2017-04-012-9/+208
| | | | | | | | | | | This calculates the pipeline state for tessellation. It moves the gs ring calculation down to below where the tessellation shaders will be compiled, as it needs the info from those shaders. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: add tessellation support to variant code.Dave Airlie2017-04-011-6/+9
| | | | | | | This just fills out the rsrc registers for tess shaders. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: add tessellation support to shader namingDave Airlie2017-04-011-1/+3
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: port polaris vgt vertex reuse workaround.Dave Airlie2017-04-012-1/+18
| | | | | | | | This ports the VGT_VERTEX_REUSE register settings for Polaris GPUs from radeonsi. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: configure tessellation distribution register.Dave Airlie2017-04-011-4/+12
| | | | | | | This just takes the radeonsi values. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: add tessellation ring allocation support. (v2)Dave Airlie2017-04-013-13/+203
| | | | | | | | | | | | This patch adds support for the offchip rings for storing tessellation factors and attribute data. It includes the register setup for the TF ring v2: always do tess ring size calcs (Bas) Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: add support for some device specific tess information.Dave Airlie2017-04-012-0/+8
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: add tess shader stage user data support.Dave Airlie2017-04-011-7/+38
| | | | | | | | This just adds support for tess to the shader stage conversion and emits the per-stage descriptors/constants for tess stages. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: add helper function to denote if tess is enabled on a pipeline.Dave Airlie2017-04-011-0/+5
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: Use the guard band.Bas Nieuwenhuizen2017-03-303-13/+90
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Prepare for not using the guard band for lines & points.Bas Nieuwenhuizen2017-03-303-0/+32
| | | | | | | | | | | Vulkan Clipping is defined in terms of vertices, the scissor based clipping happens on pixels. There is a difference with points and lines, as a vertex can be outside the viewport while some pixels are in. On Vulkan thoise pixels shouldn't be drawn, while they would be with the guardband. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Drop the default viewport when 0 viewports are given.Bas Nieuwenhuizen2017-03-301-17/+2
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Set proper viewport & scissor for meta draws.Bas Nieuwenhuizen2017-03-306-75/+214
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* amd: GFX9 packet changesMarek Olšák2017-03-301-2/+2
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* amd: add texture format definitions for GFX9Marek Olšák2017-03-301-4/+4
| | | | | | | | the DATA_FORMAT and NUM_FORMAT fields are the same, but some of the enums differ, thus add GFX6 and GFX9 suffixes, so that the IB parser can show enums for both. Reviewed-by: Nicolai Hähnle <[email protected]>
* amd: resolve remaining definition conflicts with gfx9d.hMarek Olšák2017-03-301-3/+3
| | | | | | | | Add _GFX6 and _GFX9 suffixes to conflicting definitions. sid.h and gfx9d.h can now be included in the same file. Reviewed-by: Nicolai Hähnle <[email protected]>
* amdgpu/addrlib: Rewrite tile mode optmization codeXavi Zhang2017-03-301-3/+2
| | | | Note: remove reference to degrade4Space and use opt4Space instead.
* radv: move to using nir clip/cull merge pass.Dave Airlie2017-03-301-0/+1
| | | | | | | | | | Doing this before tessellation makes doing some bits of tessellation a bit cleaner. It also cleans up a bit of the llvm generator code. Reviewed-by: Edward O'Callaghan <[email protected]> Acked-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: Enable sparseBinding feature.Bas Nieuwenhuizen2017-03-291-4/+8
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv/amdgpu: Use reference counting for bos.Bas Nieuwenhuizen2017-03-292-0/+11
| | | | | | | | | | | | | Per the Vulkan spec, memory objects may be deleted before the buffers and images using them are deleted, although those resources then cannot be used except for deletion themselves. For the virtual buffers, we need to access them on resource destruction to unmap the regions, so this results in a use-after-free. Implement reference counting to avoid this. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Implement sparse memory binding.Bas Nieuwenhuizen2017-03-291-4/+80
| | | | | | | v2: Only submit when semaphores are specified. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Implement sparse image creation.Bas Nieuwenhuizen2017-03-292-2/+22
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Implement sparse buffer creation.Bas Nieuwenhuizen2017-03-292-2/+21
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
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