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path: root/src/amd/vulkan
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* autotools: include meson build files in tarballDylan Baker2018-01-191-1/+2
* radv: Always re-emit the sample position offset user SGPR.Bas Nieuwenhuizen2018-01-191-17/+17
* radv: emit pa_sc_mode_cntl_0 with multisample state.Bas Nieuwenhuizen2018-01-192-3/+4
* radv: Use correct bindings for inputRate in key generation.Bas Nieuwenhuizen2018-01-191-1/+7
* radv: Implement VK_ANDROID_native_buffer.Bas Nieuwenhuizen2018-01-197-4/+407
* radv: Add create image flag to not use DCC/CMASK.Bas Nieuwenhuizen2018-01-192-19/+25
* radv: Generate VK_ANDROID_native_buffer.Bas Nieuwenhuizen2018-01-193-2/+9
* radv: Replace an assert with unreachable.Bas Nieuwenhuizen2018-01-191-1/+1
* radv: Remove DCC check on CS resolve dst image.Bas Nieuwenhuizen2018-01-191-3/+0
* radv/ws: get rid of useless return valueDave Airlie2018-01-181-3/+2
* radv: Initialize DCC on transition from preinitialized.Bas Nieuwenhuizen2018-01-181-1/+3
* radv: Implement VK_EXT_debug_report.Bas Nieuwenhuizen2018-01-173-0/+50
* Revert "ac/shader: gather If TES reads TESSINNER or TESSOUTER"Samuel Pitoiset2018-01-151-0/+2
* ac/shader: gather If TES reads TESSINNER or TESSOUTERSamuel Pitoiset2018-01-151-2/+0
* radv/radeonsi/nir: lower 64bit flrpTimothy Arceri2018-01-131-0/+1
* radv: don't emit unneeded vertex state.Dave Airlie2018-01-122-8/+49
* meson: Use dependencies for nirDylan Baker2018-01-111-3/+3
* meson: Use consistent styleDylan Baker2018-01-111-11/+21
* radv: reset semaphores & fences on sync_file export.Bas Nieuwenhuizen2018-01-111-0/+16
* radv: Remove some typos.Bas Nieuwenhuizen2018-01-102-4/+4
* radv: Implement VK_EXT_discard_rectangles.Bas Nieuwenhuizen2018-01-105-6/+110
* radv: Add mapping between dynamic state mask and external enum.Bas Nieuwenhuizen2018-01-103-38/+79
* radv: remove radv_pipeline_layout::push_constant_stages fieldSamuel Pitoiset2018-01-102-3/+0
* radv/gfx9: calculate the number of ES VGPRs for merged shadersSamuel Pitoiset2018-01-101-3/+10
* radv/gfx9: enable LDS for GS only if the ES type is TESSamuel Pitoiset2018-01-101-1/+2
* radv: avoid PS partial flushes when viewports/scissors don't changeSamuel Pitoiset2018-01-081-6/+33
* radv: add has_scissor_bug for Vega10 and RavenSamuel Pitoiset2018-01-083-2/+6
* radv/gfx9: do not load VGPR1 when GS uses points or linesSamuel Pitoiset2018-01-081-1/+3
* radv: make shader BOs read-only for the GPUSamuel Pitoiset2018-01-083-1/+7
* radv: make descriptor BOs read-only for the GPUSamuel Pitoiset2018-01-082-3/+7
* radv: make the indirect GFX config BO read-only for the GPUSamuel Pitoiset2018-01-081-1/+2
* radv/winsys: make IBs read-only for the GPUSamuel Pitoiset2018-01-081-6/+11
* radv/winsys: add RADEON_FLAG_READ_ONLYSamuel Pitoiset2018-01-082-1/+4
* radv/winsys: rework radv_amdgpu_bo_va_op()Samuel Pitoiset2018-01-081-17/+23
* radv: remove unused radv_color_buffer_info::cb_clear_valueXSamuel Pitoiset2018-01-051-2/+0
* radv: limit the scissor bug workaround to Vega 10 and RavenSamuel Pitoiset2018-01-051-1/+6
* radv: Use correct flush bits for flushing L2 during CB/DB flushes.Bas Nieuwenhuizen2018-01-041-13/+16
* radv: Invalidate L1 for VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT.Bas Nieuwenhuizen2018-01-041-1/+1
* radv/gfx9: reduce the number of input VGPRs for the GS stageSamuel Pitoiset2018-01-041-1/+14
* amd/common: scan if gl_PrimitiveID is used before translating to LLVMSamuel Pitoiset2018-01-041-3/+3
* radv: Allow writing 0 scissors.Bas Nieuwenhuizen2018-01-041-1/+2
* radv: Use correct HTILE expanded words.Bas Nieuwenhuizen2018-01-041-2/+4
* ac: rename has_syncobj_wait -> has_syncobj_wait_for_submitMarek Olšák2018-01-042-5/+5
* radv: Implement binning on GFX9.Bas Nieuwenhuizen2017-12-314-6/+348
* radv: Add flag for enabling binning.Bas Nieuwenhuizen2017-12-312-0/+9
* radv: Also set DCC params for sampling for input attachment usage.Bas Nieuwenhuizen2017-12-291-1/+2
* radv: Enable DCC with transfers.Bas Nieuwenhuizen2017-12-291-2/+1
* radv: Decompress copy destination if formats are incompatible.Bas Nieuwenhuizen2017-12-291-2/+25
* radv: Disable DCC for GENERAL layout and compute transfer dest.Bas Nieuwenhuizen2017-12-294-8/+47
* radv: Don't init DCC metadata during FS resolve.Bas Nieuwenhuizen2017-12-291-5/+0
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