summaryrefslogtreecommitdiffstats
path: root/src/amd/vulkan
Commit message (Expand)AuthorAgeFilesLines
* radv: use the optimal packets order for dispatch callsSamuel Pitoiset2017-11-021-8/+53
* radv: Don't expose heaps with 0 memory.Bas Nieuwenhuizen2017-11-023-53/+101
* radv: make radv_bind_descriptor_set() staticSamuel Pitoiset2017-11-022-6/+3
* radv: make sure we set buffers as shareable properly.Dave Airlie2017-11-022-2/+7
* radv: bail out when binding the same vertex buffersSamuel Pitoiset2017-10-311-2/+16
* radv: bail out when binding the same index bufferSamuel Pitoiset2017-10-312-0/+14
* radv: use correct alloc function when loading from diskTimothy Arceri2017-10-311-1/+14
* radv: Fix -Wformat-security issueAlex Smith2017-10-301-1/+1
* radv: add cache items to in memory cache when reading from diskTimothy Arceri2017-10-301-70/+71
* radv: Implement VK_AMD_shader_infoAlex Smith2017-10-296-35/+171
* radv: allow to use a compute shader for resetting the query poolSamuel Pitoiset2017-10-271-7/+9
* radv: make radv_fill_buffer() return the needed flush bitsSamuel Pitoiset2017-10-274-58/+57
* radv: add support for local bos. (v3)Dave Airlie2017-10-2611-22/+51
* radv: only copy the dynamic states that changedSamuel Pitoiset2017-10-261-23/+69
* radv: store the dynamic state mask into radv_dynamic_stateSamuel Pitoiset2017-10-263-7/+12
* radv: only emit the depth bounds test values when set dynamicallySamuel Pitoiset2017-10-261-2/+1
* radv: Compute ac keys from pipeline key.Bas Nieuwenhuizen2017-10-261-72/+41
* radv: Add single pipeline cache key.Bas Nieuwenhuizen2017-10-263-8/+55
* radv: Don't compute as_ls/as_es before hashing.Bas Nieuwenhuizen2017-10-261-14/+12
* radv: print NIR before LLVM IR and disassemblySamuel Pitoiset2017-10-251-7/+10
* radv: Fix truncation issue hexifying the cache uuid for the disk cache.Bas Nieuwenhuizen2017-10-251-2/+2
* radv: enable lower to scalar nir passTimothy Arceri2017-10-251-0/+24
* radv: use device name in cache creation like radeonsi.Dave Airlie2017-10-251-2/+3
* radv: use a define for the transition point between cp and compute shaderDave Airlie2017-10-251-3/+9
* radv: only emit dfsm packets if dfsm is allowed.Dave Airlie2017-10-242-3/+4
* radv: move nir print after linking is doneTimothy Arceri2017-10-242-5/+7
* radv: clone meta shaders before linkingTimothy Arceri2017-10-241-1/+8
* radv: Update code pointer correctly if a variant is already createdAlex Smith2017-10-231-0/+2
* radv: automake: include radv_extensions.py in the tarball17.3-branchpointJuan A. Suarez Romero2017-10-231-0/+1
* radv: Disallow indirect outputs for GS on GFX9 as well.Bas Nieuwenhuizen2017-10-231-3/+1
* radv/ac/nir: only emit tess factors to storage if tes reads themDave Airlie2017-10-231-0/+1
* radv: Don't use vgpr indexing for outputs on GFX9.Bas Nieuwenhuizen2017-10-221-0/+5
* radv: Don't compile shaders when they are cached already.Bas Nieuwenhuizen2017-10-211-19/+23
* radv: Don't check for max GL GS invocations.Bas Nieuwenhuizen2017-10-211-2/+0
* radv: Don't explicitly reference vertex shader for draw_id.Bas Nieuwenhuizen2017-10-211-1/+1
* radv: Don't reset cmd_buffer->state.dirty.Bas Nieuwenhuizen2017-10-211-2/+0
* radv: Correctly detect changed shaders for vertex descriptors.Bas Nieuwenhuizen2017-10-211-6/+6
* radv: Fix pipeline cache locking issuesAlex Smith2017-10-211-7/+23
* radv: disable implicit sync for radv allocated bos v3Andres Rodriguez2017-10-214-1/+8
* radv: factor out radv_alloc_memoryAndres Rodriguez2017-10-212-5/+25
* radv: Expose VK_EXT_global_priorityAndres Rodriguez2017-10-212-0/+3
* radv: don't skip PS/VS partial flushAndres Rodriguez2017-10-211-8/+6
* radv: Implement VK_EXT_global_priorityAndres Rodriguez2017-10-214-8/+62
* radv: hardcode shader WAVE_LIMIT to the maximum valueAndres Rodriguez2017-10-211-9/+18
* nir: Get rid of nir_shader::stageJason Ekstrand2017-10-201-5/+5
* radv: use optimal packet order for drawsSamuel Pitoiset2017-10-201-17/+79
* radv: add radv_emit_shaders_prefetch()Samuel Pitoiset2017-10-201-12/+19
* radv: add radv_emit_shader_prefetch()Samuel Pitoiset2017-10-201-25/+23
* radv: don't flush the VS when srcStageMask == TOP_OF_PIPE_BITFredrik Höglund2017-10-201-2/+1
* radv: mark total_count as MAYBE_UNUSED in CmdSet{Viewport,Scissor}Samuel Pitoiset2017-10-201-2/+2
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-22 14:58:07 +0000