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* radv: remove unnecessary memset() in radv_AllocateCommandBuffers()Samuel Pitoiset2017-11-131-3/+0
* radv: remove useless initializations in radv_create_cmd_buffer()Samuel Pitoiset2017-11-131-2/+0
* radv: remove useless memset() in radv_CreateFence()Samuel Pitoiset2017-11-131-1/+0
* radv: use vk_error() everywhere an error is returnedSamuel Pitoiset2017-11-138-27/+27
* radv: make radv_emit_framebuffer_state() staticSamuel Pitoiset2017-11-132-3/+2
* radv: do not emit the framebuffer when restoring a passSamuel Pitoiset2017-11-131-1/+1
* radv: prefetch VBO descriptors at the right placeSamuel Pitoiset2017-11-132-0/+21
* radv: add radv_emit_prefetch_TC_L2_async() helperSamuel Pitoiset2017-11-131-2/+9
* radv: rename radv_emit_shaders_prefetch() to radv_emit_prefetch()Samuel Pitoiset2017-11-131-6/+6
* radv: emit esgs ring size in one place.Dave Airlie2017-11-132-7/+8
* radv: move calculating vs out info regs into pipeline.Dave Airlie2017-11-133-25/+34
* radv: Fix architecture in radeon_icd.{arch}.jsonChad Versace2017-11-091-1/+1
* amd/addrlib: update to latest versionMarek Olšák2017-11-083-3/+0
* radv: move is_local up to the winsys level.Dave Airlie2017-11-064-3/+6
* radv: wrap cs_add_buffer in an inline. (v2)Dave Airlie2017-11-066-41/+49
* radv: when loading regs no need to add bufferDave Airlie2017-11-061-2/+0
* radv: pre-calculate user_data_0 registers and store in pipelineDave Airlie2017-11-065-52/+55
* radv: add initial copy descriptor support. (v2)Dave Airlie2017-11-061-2/+53
* radv: move descriptor sets out of cmd_state.Dave Airlie2017-11-063-17/+20
* radv: add helper for setting a descriptor.Dave Airlie2017-11-063-10/+17
* radv: move vertex binding out of cmd state.Dave Airlie2017-11-062-4/+4
* radv: reorder cmd_state to remove a hole.Dave Airlie2017-11-061-1/+1
* radv: free attachments on end command buffer.Dave Airlie2017-11-061-0/+2
* radv: Optimize calling radv_save_descriptors.Bas Nieuwenhuizen2017-11-041-4/+2
* radv: Use an array to store descriptor sets.Bas Nieuwenhuizen2017-11-042-26/+50
* radv: use the optimal packets order for dispatch callsSamuel Pitoiset2017-11-021-8/+53
* radv: Don't expose heaps with 0 memory.Bas Nieuwenhuizen2017-11-023-53/+101
* radv: make radv_bind_descriptor_set() staticSamuel Pitoiset2017-11-022-6/+3
* radv: make sure we set buffers as shareable properly.Dave Airlie2017-11-022-2/+7
* radv: bail out when binding the same vertex buffersSamuel Pitoiset2017-10-311-2/+16
* radv: bail out when binding the same index bufferSamuel Pitoiset2017-10-312-0/+14
* radv: use correct alloc function when loading from diskTimothy Arceri2017-10-311-1/+14
* radv: Fix -Wformat-security issueAlex Smith2017-10-301-1/+1
* radv: add cache items to in memory cache when reading from diskTimothy Arceri2017-10-301-70/+71
* radv: Implement VK_AMD_shader_infoAlex Smith2017-10-296-35/+171
* radv: allow to use a compute shader for resetting the query poolSamuel Pitoiset2017-10-271-7/+9
* radv: make radv_fill_buffer() return the needed flush bitsSamuel Pitoiset2017-10-274-58/+57
* radv: add support for local bos. (v3)Dave Airlie2017-10-2611-22/+51
* radv: only copy the dynamic states that changedSamuel Pitoiset2017-10-261-23/+69
* radv: store the dynamic state mask into radv_dynamic_stateSamuel Pitoiset2017-10-263-7/+12
* radv: only emit the depth bounds test values when set dynamicallySamuel Pitoiset2017-10-261-2/+1
* radv: Compute ac keys from pipeline key.Bas Nieuwenhuizen2017-10-261-72/+41
* radv: Add single pipeline cache key.Bas Nieuwenhuizen2017-10-263-8/+55
* radv: Don't compute as_ls/as_es before hashing.Bas Nieuwenhuizen2017-10-261-14/+12
* radv: print NIR before LLVM IR and disassemblySamuel Pitoiset2017-10-251-7/+10
* radv: Fix truncation issue hexifying the cache uuid for the disk cache.Bas Nieuwenhuizen2017-10-251-2/+2
* radv: enable lower to scalar nir passTimothy Arceri2017-10-251-0/+24
* radv: use device name in cache creation like radeonsi.Dave Airlie2017-10-251-2/+3
* radv: use a define for the transition point between cp and compute shaderDave Airlie2017-10-251-3/+9
* radv: only emit dfsm packets if dfsm is allowed.Dave Airlie2017-10-242-3/+4
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