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* radv: fix trace dumping for !use_ib_bosGrazvydas Ignotas2017-06-111-3/+11
| | | | | | | | Fixes trace dumping crash for SI or when RADV_DEBUG=noibs is set. Fixes: 97dfff5410 "radv: Dump command buffer on hang." Signed-off-by: Grazvydas Ignotas <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: introduce perf test env var and allow to enable chainingDave Airlie2017-06-094-3/+6
| | | | | | | | | | | | | We have some features that seem to slow things down or cause other possible undesireable side effects, but it would be nice to test games etc with them easily. I forsee multisample DCC and maybe some shader opt changes using this. For now use it for batch chaining. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: enable GFX9 on radvDave Airlie2017-06-061-2/+4
| | | | | | | | I'm open to reverting this closer to release if bad things happen, but it might be easier to debugging to leave it for now. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: split metadata struct into legacy/gfx9 parts.Dave Airlie2017-06-061-19/+23
| | | | | | | This is just ported from radeonsi. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: use ac_compute_surfaceNicolai Hähnle2017-06-051-386/+6
| | | | Reviewed-by: Dave Airlie <[email protected]>
* radv: prepare fmask surface creationDave Airlie2017-06-051-1/+2
| | | | | | | | | | | | | | | | | The old code copied over all the surface info from the image surface, we only want some bits of it, and to modify the flags. This prevents a regression in dEQP-VK.api.copy_and_blit.resolve_image.* and others in the subsequent switch to ac_compute_surface. v2: - also disable opt4Space in radv_amdgpu_surface, so that we can apply this patch separately *before* switching to ac_compute_surface and hopefully avoid intermittent regressions (Nicolai) Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Signed-off-by: Nicolai Hähnle <[email protected]>
* radv: use amdgpu_addr_createNicolai Hähnle2017-06-054-158/+5
| | | | Reviewed-by: Dave Airlie <[email protected]>
* radv: stop using radv_amdgpu_winsys::familyNicolai Hähnle2017-06-052-2/+2
| | | | Reviewed-by: Dave Airlie <[email protected]>
* radv: use ac_gpu_infoNicolai Hähnle2017-06-052-170/+6
| | | | Reviewed-by: Dave Airlie <[email protected]>
* radv: remove radeon_info::nameNicolai Hähnle2017-06-051-28/+0
| | | | Reviewed-by: Dave Airlie <[email protected]>
* radv: use ac_surface data structuresNicolai Hähnle2017-06-051-30/+33
| | | | | | | | | This is mostly mechanical changes of renaming types and introducing "legacy" everywhere. It doesn't use the ac_surface computation functions yet. Reviewed-by: Dave Airlie <[email protected]>
* radv: rename radeon_surf::bo_{size,alignment} to surf_{size,alignment}Nicolai Hähnle2017-06-051-4/+4
| | | | | | To match radeonsi / ac_surface. Reviewed-by: Dave Airlie <[email protected]>
* radv: remove radeon_surf_level::nblk_zNicolai Hähnle2017-06-051-4/+0
| | | | | | | We're not using thick tiling modes, so we can just derive the value ourselves. Reviewed-by: Dave Airlie <[email protected]>
* radv: remove radeon_surf_level::dcc_enabledNicolai Hähnle2017-06-051-2/+2
| | | | | | Like radeonsi; replace with radeon_surf::num_dcc_levels. Reviewed-by: Dave Airlie <[email protected]>
* radv: remove radeon_surf_level::pitch_bytesNicolai Hähnle2017-06-051-1/+0
| | | | | | | Like radeonsi. This saves memory, and the information can easily be recomputed on the fly where necessary. Reviewed-by: Dave Airlie <[email protected]>
* radv: enable POLARIS12 support.Dave Airlie2017-05-051-0/+5
| | | | | | | | | | | This just adds the chip in the right places. We don't set the partial_vs_wave workaround, as radeonsi doesn't, but have to confirm it's not required. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Cc: "17.1" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: Add userspace fence buffer per context.Bas Nieuwenhuizen2017-05-034-37/+44
| | | | | | | | | | Having it in the winsys didn't work when multiple devices use the same winsys, as we then have multiple contexts per queue, and each context counts separately. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Fixes: 7b9963a28f4 "radv: Enable userspace fence checking."
* radv: drop unused surface level members.Dave Airlie2017-05-031-3/+0
| | | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/image: drop blk_dDave Airlie2017-05-031-1/+1
| | | | | | | This was pretty much unused. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: remove some members of radeon surface.Dave Airlie2017-05-031-28/+32
| | | | | | | | We would be storing this info twice per image, no need to, remove it from the surface struct. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: Enable userspace fence checking.Bas Nieuwenhuizen2017-04-263-3/+36
| | | | | | | | | | v2: - Added some error handling. - memset the buffer to 0. v3: Added assert for buffer size. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: fix stencil regression since new addrlib importDave Airlie2017-04-131-1/+1
| | | | | | | | | | The addrlib import meant we'd return after we attempted to setup the no stencil bits for an S8_UINT, now we break and use the stencil level info when creating stencil DB info. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* amdgpu/addrlib: Rewrite tile mode optmization codeXavi Zhang2017-03-301-3/+2
| | | | Note: remove reference to degrade4Space and use opt4Space instead.
* radv/amdgpu: Use reference counting for bos.Bas Nieuwenhuizen2017-03-292-0/+11
| | | | | | | | | | | | | Per the Vulkan spec, memory objects may be deleted before the buffers and images using them are deleted, although those resources then cannot be used except for deletion themselves. For the virtual buffers, we need to access them on resource destruction to unmap the regions, so this results in a use-after-free. Implement reference counting to avoid this. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv/amdgpu: Add winsys implementation of virtual buffers.Bas Nieuwenhuizen2017-03-293-26/+344
| | | | | | | | | v2: - Added comments. - Fixed a double unmap bug. - Actually unmap the non-edge old ranges. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv/winsys: use drmGetDevice2 APIEmil Velikov2017-03-151-2/+2
| | | | | | | | | | | | | Analogous to previous commit v2: Add explicit require_libdrm check. Cc: Dave Airlie <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> (v1) Reviewed-by: Bas Nieuwenhuizen <[email protected]> (v1) Reviewed-by: Eric Engestrom <[email protected]> (v1) Tested-by: Mike Lothian <[email protected]>
* radv/amdgpu: Let addrlib calculate the HTILE parameters.Bas Nieuwenhuizen2017-03-071-0/+26
| | | | | | | | | | Still not sure we can support miptrees when sampling from HTILE enabled textures. Added the tcCompatible winsys stuff while I'm at it. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv/amdgpu: Add some debug flags.Bas Nieuwenhuizen2017-03-062-3/+7
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv/winsys: fix freeing imported memory.Andres Rodriguez2017-02-271-0/+2
| | | | | | | | This bo->fd wasn't setting some stuff correctly that could lead to crashes for anything using this path later. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: Special case the initial preamble.Bas Nieuwenhuizen2017-02-211-10/+16
| | | | | | | For flushing we don't want to flush every third IB. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: fix cik macroModeIndex.Dave Airlie2017-02-151-0/+14
| | | | | | | | | | This just a CIK fix ported from radeonsi. Tested-by: Kai Wasserbäch <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Cc: "13.0 17.0" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: reduce CPU overhead merging bo lists.Dave Airlie2017-02-121-1/+11
| | | | | | | | | | | | Just noticed we do a fair bit of unneeded searching here. Since we know that the buffers in a CS are unique already, the first time we get any buffers, we can just memcpy those into place, and when we are searching for subsequent CSes, we only have to search up until where the previous unique buffers were. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/amdgpu: Support a preamble CS.Bas Nieuwenhuizen2017-01-301-12/+50
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* ac/debug: Dump indirect buffers.Bas Nieuwenhuizen2017-01-091-2/+4
| | | | | | | | | | | | | | This is for handling chained command buffers and secondary command buffers. It doesn't handle the trace id for secondary command buffers yet, but I don't think that is possible in general with just writes, as we could call a secondary command buffer multiple times. I think this is good enough for now, as the most useful case is the chaining when we grow an IB. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Dump command buffer on hang.Bas Nieuwenhuizen2017-01-091-0/+30
| | | | | | | | | | | | | v2: - Now use the filename specified by RADV_TRACE_FILE env var. - Use the same var to enable tracing. I thought we could as well always set the filename explicitly instead of having some arbitrary defaults, and at that point we don't need a separate feature enable. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: add semaphore supportDave Airlie2016-12-181-3/+42
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: pass queue index into winsys submissionDave Airlie2016-12-181-3/+10
| | | | | | This is so we can submit on separate queues if needed Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv/winsys: Make WaitIdle queue aware.Bas Nieuwenhuizen2016-12-183-18/+28
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv/winsys: start adding support for DMA/compute queueDave Airlie2016-12-181-5/+20
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv/winsys: Expose number of compute/dma rings.Bas Nieuwenhuizen2016-12-181-1/+13
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv/winsys: consolidate request->fence codeDave Airlie2016-12-171-22/+19
| | | | Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv: fix resource leak in radv_amdgpu_ctx_createNayan Deshmukh2016-12-061-0/+1
| | | | | | | | | CovID: 1396387 V2. Fixup bad whitespace. Signed-off-by: Nayan Deshmukh <[email protected]> Reviewed-by: Edward O'Callaghan <[email protected]>
* radv: split the device local memory heap into twoFredrik Höglund2016-10-281-1/+9
| | | | | | | | | | Advertise two device local memory heaps; one that is host visible and one that is not. This makes it possible for clients to tell how much host visible vs. non-host visible memory is available. Signed-off-by: Dave Airlie <[email protected]>
* radv: drop local MIN/MAX macros.Dave Airlie2016-10-191-1/+1
| | | | | | | Use the ones in macros.h instead. Acked-by: Jason Ekstrand <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/winsys: Fail early on overgrown cs.Gustaw Smolarczyk2016-10-161-4/+14
| | | | | | | | When !use_ib_bos, we can't easily chain ibs one to another. If the required cs size grows over 1Mi - 8 dwords just fail the cs so that we won't assert-fail in radv_amdgpu_winsys_cs_submit later on. Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv/winsys: Fix radv_amdgpu_cs_grow min_size argument. (v2)Gustaw Smolarczyk2016-10-121-4/+7
| | | | | | | | | | | It's supposed to be how much at least we want to grow the cs, not the minimum size of the cs after growth. v2: Unbreak use_ib_bos. Don't mask the ib_size when !use_ib_bos, since it's not needed. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/winsys: Fix mem leak at failed do_winsys_init() call siteEdward O'Callaghan2016-10-121-2/+6
| | | | | | | | | | | | Probably unlikely however ensure we don't leak a heap allocation on the fail path. V.2: also fix missing 'amdgpu_device_deinitialize()' calls (Emil Velikov). Signed-off-by: Edward O'Callaghan <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv/winsys: Trivial style and readability fixupsEdward O'Callaghan2016-10-124-12/+17
| | | | | | | | Drop/add a few newlines where appropriate and drop a couple of unnessary braces. Signed-off-by: Edward O'Callaghan <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: Use proper header guards over 'pragma once' directivesEdward O'Callaghan2016-10-105-5/+26
| | | | | Signed-off-by: Edward O'Callaghan <[email protected]> Reviewed-by: Eric Engestrom <[email protected]>
* radv: add initial non-conformant radv vulkan driverDave Airlie2016-10-079-0/+2174
This squashes all the radv development up until now into one for merging. History can be found: https://github.com/airlied/mesa/tree/semi-interesting This requires llvm 3.9 and is in no way considered a conformant vulkan implementation. It can run a number of vulkan applications, and supports all GPUs using the amdgpu kernel driver. Thanks to Intel for providing anv and spirv->nir, and Emil Velikov for reviewing build integration. Parts of this are: Reviewed-by: Nicolai Hähnle <[email protected]> Acked-by: Edward O'Callaghan <[email protected]> Authors: Bas Nieuwenhuizen and Dave Airlie Signed-off-by: Dave Airlie <[email protected]>
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