| Commit message (Collapse) | Author | Age | Files | Lines |
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This just a CIK fix ported from radeonsi.
Tested-by: Kai Wasserbäch <[email protected]>
Reviewed-by: Edward O'Callaghan <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Cc: "13.0 17.0" <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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Just noticed we do a fair bit of unneeded searching here.
Since we know that the buffers in a CS are unique already,
the first time we get any buffers, we can just memcpy those into
place, and when we are searching for subsequent CSes, we only
have to search up until where the previous unique buffers were.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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Signed-off-by: Bas Nieuwenhuizen <[email protected]>
Reviewed-by: Dave Airlie <[email protected]>
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This is for handling chained command buffers and secondary command
buffers. It doesn't handle the trace id for secondary command buffers
yet, but I don't think that is possible in general with just writes,
as we could call a secondary command buffer multiple times.
I think this is good enough for now, as the most useful case is the
chaining when we grow an IB.
Signed-off-by: Bas Nieuwenhuizen <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
Reviewed-by: Dave Airlie <[email protected]>
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v2:
- Now use the filename specified by RADV_TRACE_FILE env var.
- Use the same var to enable tracing.
I thought we could as well always set the filename explicitly
instead of having some arbitrary defaults, and at that point
we don't need a separate feature enable.
Signed-off-by: Bas Nieuwenhuizen <[email protected]>
Reviewed-by: Dave Airlie <[email protected]>
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Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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This is so we can submit on separate queues if needed
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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Signed-off-by: Bas Nieuwenhuizen <[email protected]>
Reviewed-by: Dave Airlie <[email protected]>
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Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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Signed-off-by: Bas Nieuwenhuizen <[email protected]>
Reviewed-by: Dave Airlie <[email protected]>
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Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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CovID: 1396387
V2. Fixup bad whitespace.
Signed-off-by: Nayan Deshmukh <[email protected]>
Reviewed-by: Edward O'Callaghan <[email protected]>
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Advertise two device local memory heaps; one that is host visible
and one that is not.
This makes it possible for clients to tell how much host visible
vs. non-host visible memory is available.
Signed-off-by: Dave Airlie <[email protected]>
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Use the ones in macros.h instead.
Acked-by: Jason Ekstrand <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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When !use_ib_bos, we can't easily chain ibs one to another. If the
required cs size grows over 1Mi - 8 dwords just fail the cs so that we
won't assert-fail in radv_amdgpu_winsys_cs_submit later on.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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It's supposed to be how much at least we want to grow the cs, not the
minimum size of the cs after growth.
v2: Unbreak use_ib_bos.
Don't mask the ib_size when !use_ib_bos, since it's not needed.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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Probably unlikely however ensure we don't leak a heap allocation
on the fail path.
V.2:
also fix missing 'amdgpu_device_deinitialize()' calls (Emil Velikov).
Signed-off-by: Edward O'Callaghan <[email protected]>
Reviewed-by: Emil Velikov <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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Drop/add a few newlines where appropriate and drop a couple of
unnessary braces.
Signed-off-by: Edward O'Callaghan <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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Signed-off-by: Edward O'Callaghan <[email protected]>
Reviewed-by: Eric Engestrom <[email protected]>
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This squashes all the radv development up until now into
one for merging.
History can be found:
https://github.com/airlied/mesa/tree/semi-interesting
This requires llvm 3.9 and is in no way considered
a conformant vulkan implementation. It can run a number
of vulkan applications, and supports all GPUs using
the amdgpu kernel driver.
Thanks to Intel for providing anv and spirv->nir,
and Emil Velikov for reviewing build integration.
Parts of this are:
Reviewed-by: Nicolai Hähnle <[email protected]>
Acked-by: Edward O'Callaghan <[email protected]>
Authors: Bas Nieuwenhuizen and Dave Airlie
Signed-off-by: Dave Airlie <[email protected]>
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