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path: root/src/amd/vulkan/si_cmd_buffer.c
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* ac: move PBB MAX_ALLOC_COUNT into radeon_infoMarek Olšák2019-09-181-31/+1
* ac: add has_clear_state to ac_gpu_infoSamuel Pitoiset2019-08-271-10/+11
* radv/gfx10: don't initialize VGT_INSTANCE_STEP_RATE_0Samuel Pitoiset2019-08-231-1/+2
* radv/gfx10: do not emit PA_SC_TILE_STEERING_OVERRIDE twiceSamuel Pitoiset2019-08-201-2/+0
* radv: do not emit PKT3_CONTEXT_CONTROL with AMDGPU 3.6.0+Samuel Pitoiset2019-08-201-3/+6
* radv: Add Renoir support.Bas Nieuwenhuizen2019-08-191-0/+1
* radv: Fix off by one for S_028C48_MAX_ALLOC_COUNT.Bas Nieuwenhuizen2019-08-081-1/+1
* radv/gfx10: disable LATE_ALLOC_GS on Navi14Samuel Pitoiset2019-07-311-1/+8
* radv/gfx10: implement a bug workaround for GE_PC_ALLOCSamuel Pitoiset2019-07-311-0/+13
* radv/gfx10: implement a bug workaround for NGG -> legacy transitionsSamuel Pitoiset2019-07-311-2/+7
* radv/gfx10: use L2 for DMA copy/fill operationsSamuel Pitoiset2019-07-251-0/+16
* radv: change a bunch of >= GFX9 to == GFX9Samuel Pitoiset2019-07-221-6/+6
* radv: reset the window scissor with no clear state.Dave Airlie2019-07-191-1/+1
* radv/gfx10: set the pgm rsrc3/4 regs using index sh reg setDave Airlie2019-07-181-18/+18
* radv: allow to select DST_SEL with RELEASE_MEMSamuel Pitoiset2019-07-161-2/+6
* radv: allow to emit PS_DONE/CS_DONE with RELEASE_MEMSamuel Pitoiset2019-07-161-1/+2
* radv: update LATE_ALLOC_VS.LIMITSamuel Pitoiset2019-07-161-18/+42
* radv/gfx10: init more registers in the graphics preambleSamuel Pitoiset2019-07-121-0/+9
* radv/gfx10: don't emit PFP packets on ME.Dave Airlie2019-07-081-2/+3
* radv/gfx10: implement NGG support (VS only)Samuel Pitoiset2019-07-071-0/+11
* radv/gfx10: disable CLEAR_STATESamuel Pitoiset2019-07-071-4/+0
* radv/gfx10: add gfx10_cs_emit_cache_flushSamuel Pitoiset2019-07-071-1/+174
* radv/gfx10: emit VGT_VERTEX_REUSE_BLOCK_CNTL during gfx initializationSamuel Pitoiset2019-07-071-0/+1
* radv/gfx10: update shader-related fields in si_emit_graphics()Samuel Pitoiset2019-07-071-0/+13
* radv/gfx10: implement si_emit_compute()Samuel Pitoiset2019-07-071-1/+5
* radv/gfx10: initialize GE_{MAX,MIN}_VTX_INDX/INDX_OFFSETSamuel Pitoiset2019-07-071-1/+5
* radv/gfx10: set PA_SC_TILE_STEERING_OVERRIDESamuel Pitoiset2019-07-071-0/+2
* radv/gfx10: set cache control registersSamuel Pitoiset2019-07-071-0/+21
* radv/gfx10: set MAX_ALLOC_COUNTSamuel Pitoiset2019-07-071-1/+13
* radv: rename and re-document cache flush flagsSamuel Pitoiset2019-06-251-12/+12
* radv: fix some compiler warningsRhys Perry2019-06-041-4/+4
* amd/common: use generated register headerNicolai Hähnle2019-06-031-1/+0
* amd/common: use SH{0,1}_CU_EN definitions only of COMPUTE_STATIC_THREAD_MGMT_SE0Nicolai Hähnle2019-06-031-5/+5
* radv: sync before resetting a pool if there is active pending queriesSamuel Pitoiset2019-05-291-0/+5
* radv: fix the sample max distance value for 8xSamuel Pitoiset2019-05-221-1/+1
* radv: emit correct centroid priority based on the number of samplesSamuel Pitoiset2019-05-221-3/+16
* radv: clean up the sample locations codebaseSamuel Pitoiset2019-05-221-94/+72
* radv: remove remaining code related to 16 samplesSamuel Pitoiset2019-05-221-50/+0
* ac: rename SI-CIK-VI to GFX6-GFX7-GFX8Marek Olšák2019-05-151-33/+33
* radv: set WD_SWITCH_ON_EOP=1 when drawing primitives from a stream output bufferSamuel Pitoiset2019-05-021-0/+7
* radv/winsys: Set winsys bo priority on creation.Bas Nieuwenhuizen2019-01-291-1/+2
* radv: Remove unused variable.Bas Nieuwenhuizen2019-01-271-1/+0
* radv: always pass the GFX9 fence data to si_cs_emit_cache_flush()Samuel Pitoiset2019-01-231-7/+2
* radv: compute the GFX9 fence VA at allocation timeSamuel Pitoiset2019-01-231-1/+1
* radv: remove old_fence parameter from si_cs_emit_write_event_eop()Samuel Pitoiset2019-01-231-5/+4
* radv: reset pending_reset_query when flushing cachesSamuel Pitoiset2018-12-051-0/+5
* radv: set optimal OVERWRITE_COMBINER_WATERMARK on GFX9Samuel Pitoiset2018-11-131-3/+0
* radv: make use of num_good_cu_per_sh in si_emit_graphics() tooSamuel Pitoiset2018-11-121-2/+1
* radv: replace si_emit_wait_fence() with radv_cp_wait_mem()Samuel Pitoiset2018-11-051-5/+9
* radv: add support for Raven2Samuel Pitoiset2018-11-011-0/+1
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