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path: root/src/amd/vulkan/radv_private.h
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* radv: store the dispatch initiator into the deviceSamuel Pitoiset2017-12-141-0/+1
* radv: only re-mit the index type when it changesSamuel Pitoiset2017-12-081-0/+1
* radv: track different status of a command bufferSamuel Pitoiset2017-12-081-0/+9
* radv: Add LLVM version to the device name stringAlex Smith2017-12-071-1/+1
* radv/wsi: drop allocate memory special caseDave Airlie2017-12-041-10/+0
* radv: remove set but unnecessary radv_color_buffer_info::micro_tile_modeSamuel Pitoiset2017-11-301-1/+0
* radv: do not store gfx9_epitch in radv_color_buffer_infoSamuel Pitoiset2017-11-301-1/+0
* radv: use a 16 bytes array for the sampled/storage image descriptorsSamuel Pitoiset2017-11-201-4/+2
* radv: replace vb_dirty with RADV_CMD_DIRTY_VERTEX_BUFFERSamuel Pitoiset2017-11-151-1/+1
* radv: drop radv_cmd_dirty_mask_t typedefSamuel Pitoiset2017-11-151-2/+1
* radv: use an unsigned 32-bit integer for radv_queue::family_indexSamuel Pitoiset2017-11-151-1/+1
* radv: make radv_emit_framebuffer_state() staticSamuel Pitoiset2017-11-131-2/+1
* radv: prefetch VBO descriptors at the right placeSamuel Pitoiset2017-11-131-0/+5
* radv: move calculating vs out info regs into pipeline.Dave Airlie2017-11-131-1/+8
* radv: pre-calculate user_data_0 registers and store in pipelineDave Airlie2017-11-061-0/+1
* radv: move descriptor sets out of cmd_state.Dave Airlie2017-11-061-1/+2
* radv: add helper for setting a descriptor.Dave Airlie2017-11-061-0/+4
* radv: move vertex binding out of cmd state.Dave Airlie2017-11-061-1/+1
* radv: reorder cmd_state to remove a hole.Dave Airlie2017-11-061-1/+1
* radv: Use an array to store descriptor sets.Bas Nieuwenhuizen2017-11-041-4/+10
* radv: Don't expose heaps with 0 memory.Bas Nieuwenhuizen2017-11-021-0/+3
* radv: make radv_bind_descriptor_set() staticSamuel Pitoiset2017-11-021-3/+0
* radv: make sure we set buffers as shareable properly.Dave Airlie2017-11-021-0/+2
* radv: bail out when binding the same index bufferSamuel Pitoiset2017-10-311-0/+5
* radv: Implement VK_AMD_shader_infoAlex Smith2017-10-291-0/+3
* radv: make radv_fill_buffer() return the needed flush bitsSamuel Pitoiset2017-10-271-3/+3
* radv: store the dynamic state mask into radv_dynamic_stateSamuel Pitoiset2017-10-261-1/+6
* radv: Add single pipeline cache key.Bas Nieuwenhuizen2017-10-261-2/+11
* radv: only emit dfsm packets if dfsm is allowed.Dave Airlie2017-10-241-0/+1
* radv: factor out radv_alloc_memoryAndres Rodriguez2017-10-211-0/+11
* radv: Implement VK_EXT_global_priorityAndres Rodriguez2017-10-211-0/+1
* radv: rename RADV_CMD_DIRTY_RENDER_TARGETS to RADV_CMD_DIRTY_FRAMEBUFFERSamuel Pitoiset2017-10-201-1/+1
* radv: calculate and emit GFX9 GS registers to pipeline state.Bas Nieuwenhuizen2017-10-201-0/+8
* radv: Use control shader presence for detecting tess.Bas Nieuwenhuizen2017-10-201-1/+1
* radv: drop unused r600_htile_info.Dave Airlie2017-10-201-9/+0
* radv: Remove remaining hard coded references to VS.Bas Nieuwenhuizen2017-10-191-0/+2
* radv: reuse the multiple shader store & load functions for gs copy variantTimothy Arceri2017-10-181-11/+1
* radv: remove some now unused shader compile codeTimothy Arceri2017-10-181-8/+0
* radv: add radv_hash_shaders() helperBas Nieuwenhuizen2017-10-181-0/+7
* radv: Add multiple shader cache store & load functions.Bas Nieuwenhuizen2017-10-181-0/+14
* radv/image: bump all the offset to uint64_t.Dave Airlie2017-10-171-4/+4
* radv: port to using updated anv entrypoint/extension generator.Dave Airlie2017-10-171-6/+5
* radv: take unsafe_math and sisched into account when hashing shaders.Dave Airlie2017-10-121-1/+4
* radv: add has_clear_state and enable it on CIK+ onlySamuel Pitoiset2017-10-121-1/+1
* radv: create on-disk shader cacheTimothy Arceri2017-10-121-0/+6
* radv: remove duplicate debug_flags fieldTimothy Arceri2017-10-121-1/+0
* radv: configure VGT_VERTEX_REUSE at pipeline creationSamuel Pitoiset2017-10-091-0/+1
* radv: remove unused fields in radv_raster_stateSamuel Pitoiset2017-10-091-3/+0
* radv: add radv_htile_enabled() helperSamuel Pitoiset2017-10-061-0/+6
* radv: Implement TC compatible HTILE.Bas Nieuwenhuizen2017-10-041-0/+1
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