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* radv: pass FMASK alignment to applicationDave Airlie2017-02-071-0/+1
| | | | | | | | As was done for dcc and cmask. Cc: "17.0" <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: Pass DCC alignment to application.Bas Nieuwenhuizen2017-02-071-0/+1
| | | | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Cc: "17.0" <[email protected]> Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Andres Rodriguez <[email protected]>
* radv: Pass CMASK alignment to application.Bas Nieuwenhuizen2017-02-071-0/+1
| | | | | | | | | | CMASK alignment can be greater than image data alignment, so pass it to the app so that it knows what alignment to backing memory should have. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Cc: <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: handle VK_QUEUE_FAMILY_IGNORED in image transitions (v3)Dave Airlie2017-02-021-4/+7
| | | | | | | | | | | | | The CTS tests at least are using this, and we were totally ignoring it. This hopefully fixes the bouncing multisample CTS tests. v2: get family mask in ignored case from command buffer. v3: only change things in one place, use logic from Bas. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: Get physical device from radv_device instead of the instance.Bas Nieuwenhuizen2017-01-161-9/+9
| | | | | Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Create single RADV_DEBUG env var.Bas Nieuwenhuizen2017-01-091-2/+2
| | | | | | | | | | | Also changed RADV_SHOW_QUEUES to a no compute queue option. That would make more sense later when the compute queue is established, but the transfer queue still experimental. v2: Don't include the trace flag. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: only allow cmask/dcc in color optimal.Dave Airlie2016-12-301-3/+2
| | | | | | | | I had this on transfers due to the clear color cmd, but it seems like that path shouldn't get fast clears. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: only allow cmask/dcc on exclusive or concurrent with graphics queue.Dave Airlie2016-12-301-3/+6
| | | | | | | Otherwise we don't get the barriers to flush dcc etc. Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: Also skip DCC clear flushes for compute.Bas Nieuwenhuizen2016-12-271-3/+3
| | | | | | (airlied: fixes DOOM hang with compute queue enabled) Reviewed-by: Dave Airlie <[email protected]> Signed-off-by: Bas Nieuwenhuizen <[email protected]>
* radv/image: only touch queue family info for concurrent images.Dave Airlie2016-12-211-2/+4
| | | | | | | | | | The spec says to ignore these fields for exclusive images. Fixes crashes in: dEQP-VK.clipping.* Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: Don't enable CMASK on compute queues.Bas Nieuwenhuizen2016-12-181-2/+16
| | | | | | | We can't fast clear on compute queues. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv: Use correct pitch for views with different block size.Bas Nieuwenhuizen2016-12-181-1/+4
| | | | | | | | | Needed when accessing a comrpessed texture as R32G32B32A32 from a shader. This was not encountered previously, as we used the CB for the reinterpretation, which does not use this pitch. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* radv/si: fix optimal micro tile selectionDave Airlie2016-11-271-7/+7
| | | | | | | | The same fix was posted for radeonsi, so port it here. Reviewed-by: Edward O'Callaghan <[email protected]> Cc: "13.0" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: fix image view creation for depth and stencil onlyDave Airlie2016-11-211-13/+8
| | | | | | | | | | | | | | | This fixes the image view for sampling just the depth. It removes some pointless swizzle code, and adds a missing case for the x8_d24 format. Fixes: dEQP-VK.renderpass.formats.d32_sfloat_s8_uint.input.* dEQP-VK.renderpass.formats.d24_unorm_s8_uint.input.* dEQP-VK.renderpass.formats.x8_d24_unorm_pack32.input.* Cc: "13.0" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: drop some unused cmask info members.Dave Airlie2016-11-011-4/+0
| | | | | | | | These were assigned but never used. Inspired by similiar patch in radeonsi. Signed-off-by: Dave Airlie <[email protected]>
* radv: move to using shared vk_alloc inlines.Dave Airlie2016-10-191-6/+6
| | | | | | | | This moves to the shared vk_alloc inlines for vulkan memory allocations. Acked-by: Jason Ekstrand <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* radv: trivial case stmt style fixupsEdward O'Callaghan2016-10-121-3/+3
| | | | | | | | Relocate a 'default:' to the end of a case stmt and fix an indent issue. Signed-off-by: Edward O'Callaghan <[email protected]> Reviewed-by: Thomas Helland <[email protected]>
* radv: add initial non-conformant radv vulkan driverDave Airlie2016-10-071-0/+1030
This squashes all the radv development up until now into one for merging. History can be found: https://github.com/airlied/mesa/tree/semi-interesting This requires llvm 3.9 and is in no way considered a conformant vulkan implementation. It can run a number of vulkan applications, and supports all GPUs using the amdgpu kernel driver. Thanks to Intel for providing anv and spirv->nir, and Emil Velikov for reviewing build integration. Parts of this are: Reviewed-by: Nicolai Hähnle <[email protected]> Acked-by: Edward O'Callaghan <[email protected]> Authors: Bas Nieuwenhuizen and Dave Airlie Signed-off-by: Dave Airlie <[email protected]>
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