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path: root/src/amd/vulkan/radv_device.c
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* radv: Enable VK_KHR_pipeline_executable_properties.Bas Nieuwenhuizen2019-08-121-0/+6
* amd: prepare dropping include of p_compiler.hLionel Landwerlin2019-08-091-1/+1
* radv/gfx10: Enable DCC for storage images.Bas Nieuwenhuizen2019-08-071-0/+1
* radv: Expose VK_KHR_imageless_framebuffer.Bas Nieuwenhuizen2019-08-021-0/+6
* radv: Implement VK_KHR_imageless_framebuffer.Bas Nieuwenhuizen2019-08-021-9/+23
* radv: Store color/depth surface info in attachment info instead of framebuffer.Bas Nieuwenhuizen2019-08-021-9/+4
* ac/nir,radv: Optimize bounds check for 64 bit CAS.Bas Nieuwenhuizen2019-08-021-0/+3
* radv: remove radv_get_image_fmask_info()Samuel Pitoiset2019-08-021-6/+6
* radv: remove radv_get_image_cmask_info()Samuel Pitoiset2019-08-021-2/+2
* radv: Enable VK_KHR_shader_atomic_int64Bas Nieuwenhuizen2019-08-021-5/+2
* radv/gfx10: add Wave32 support for vertex, tessellation and geometry shadersSamuel Pitoiset2019-08-021-0/+5
* radv/gfx10: add Wave32 support for fragment shadersSamuel Pitoiset2019-08-021-0/+6
* radv/gfx10: add Wave32 support for compute shadersSamuel Pitoiset2019-07-311-1/+11
* radv: implement VK_EXT_index_type_uint8Samuel Pitoiset2019-07-291-0/+6
* radv/gfx10: Enable binning.Bas Nieuwenhuizen2019-07-231-2/+1
* radv/gfx10: enable CLEAR_stateSamuel Pitoiset2019-07-231-2/+1
* radv/gfx10: do not set ELEMENT_SIZE for buffer descriptorsSamuel Pitoiset2019-07-221-4/+4
* radv: clean up fill_geom_tess_rings()Samuel Pitoiset2019-07-221-25/+9
* radv: change a bunch of >= GFX9 to == GFX9Samuel Pitoiset2019-07-221-1/+1
* radv: replace memset()+strcpy() with snprintf()Eric Engestrom2019-07-211-3/+1
* radv: drop unnecessary memset() before snprintf()Eric Engestrom2019-07-211-1/+0
* radv: put back VGT_FLUSH at ring init on gfx10Dave Airlie2019-07-181-4/+2
* radv: add an option for disabling NGG on GFX10Samuel Pitoiset2019-07-171-0/+1
* radv/gfx10: disable the TC compat zrange workaroundSamuel Pitoiset2019-07-171-0/+2
* radv/gfx10: enable geometry shadersSamuel Pitoiset2019-07-111-1/+1
* radv/gfx10: Enable tess.Bas Nieuwenhuizen2019-07-091-1/+1
* radv/gfx10: Use correct count of max_offchip_buffers.Bas Nieuwenhuizen2019-07-091-1/+4
* radv/gfx10: Load global pointers in correct userdata registers for hs/gs.Bas Nieuwenhuizen2019-07-091-2/+2
* radv: do not emit VGT_FLUSH on GFX10Samuel Pitoiset2019-07-081-2/+5
* radv/gfx10: double the number of tessellation offchip buffers per SESamuel Pitoiset2019-07-071-3/+5
* radv/gfx10: disable geometry and tessellation shadersSamuel Pitoiset2019-07-071-2/+2
* radv/gfx10: disable binningSamuel Pitoiset2019-07-071-1/+2
* radv/gfx10: disable CLEAR_STATESamuel Pitoiset2019-07-071-1/+2
* radv/gfx10: set the DCC constant encoding flagSamuel Pitoiset2019-07-071-1/+2
* radv/gfx10: mask DCC tile swizzle by alignmentSamuel Pitoiset2019-07-071-1/+4
* radv/gfx10: implement fill_geom_tess_rings()Samuel Pitoiset2019-07-071-20/+57
* radv/gfx10: implement radv_init_sampler()Samuel Pitoiset2019-07-071-6/+13
* radv/gfx10: implement radv_get_device_name()Samuel Pitoiset2019-07-071-0/+3
* radv/gfx10: set RADV_FORCE_FAMILYSamuel Pitoiset2019-07-071-1/+3
* radv/gfx10: implement radv_emit_global_shader_pointers()Samuel Pitoiset2019-07-071-1/+11
* radv/gfx10: implement radv_emit_tess_factor_ring()Samuel Pitoiset2019-07-071-1/+5
* radv/gfx10: implement radv_initialise_ds_surface()Samuel Pitoiset2019-07-071-8/+23
* radv/gfx10: implement radv_initialise_color_surface()Samuel Pitoiset2019-07-071-10/+26
* radv/gfx10: implement radv_init_dcc_control_reg()Samuel Pitoiset2019-07-071-22/+32
* amd/common/gfx10: add register JSONNicolai Hähnle2019-07-031-3/+3
* radv: rename and re-document cache flush flagsSamuel Pitoiset2019-06-251-6/+6
* radv: set DISABLE_CONSTANT_ENCODE_REG to 1 for Raven2Samuel Pitoiset2019-06-251-0/+2
* radv: add support for VK_KHR_depth_stencil_resolveSamuel Pitoiset2019-06-211-0/+21
* radv: implement compressed FMASK texture reads with RADV_PERFTEST=tccompatcmaskSamuel Pitoiset2019-06-191-0/+15
* radv: adjust the DCC base VA for mipmapped color attachmentsSamuel Pitoiset2019-06-181-0/+5
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