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path: root/src/amd/vulkan/radv_cmd_buffer.c
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* radv: Remove some typos.Bas Nieuwenhuizen2018-01-101-2/+2
* radv: Implement VK_EXT_discard_rectangles.Bas Nieuwenhuizen2018-01-101-0/+51
* radv: Add mapping between dynamic state mask and external enum.Bas Nieuwenhuizen2018-01-101-18/+18
* radv: avoid PS partial flushes when viewports/scissors don't changeSamuel Pitoiset2018-01-081-6/+33
* radv: add has_scissor_bug for Vega10 and RavenSamuel Pitoiset2018-01-081-2/+1
* radv: limit the scissor bug workaround to Vega 10 and RavenSamuel Pitoiset2018-01-051-1/+6
* radv: Invalidate L1 for VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT.Bas Nieuwenhuizen2018-01-041-1/+1
* radv: Use correct HTILE expanded words.Bas Nieuwenhuizen2018-01-041-2/+4
* radv: Implement binning on GFX9.Bas Nieuwenhuizen2017-12-311-0/+16
* radv: Disable DCC for GENERAL layout and compute transfer dest.Bas Nieuwenhuizen2017-12-291-6/+23
* radv: fix events on compute queues.Dave Airlie2017-12-281-1/+1
* radv: fix issue with multisample positions and interp_var_at_sample.Dave Airlie2017-12-221-1/+2
* radv: remove one useless check in radv_flush_constants()Samuel Pitoiset2017-12-191-1/+2
* radv: set FORCE_SIMD_DIST(1) for compute when profitableSamuel Pitoiset2017-12-141-0/+14
* radv: calculate best compute resource limitsSamuel Pitoiset2017-12-141-1/+14
* radv: store the dispatch initiator into the deviceSamuel Pitoiset2017-12-141-11/+1
* radv: always emit all compute block componentsSamuel Pitoiset2017-12-141-10/+5
* radv: remove useless check radv_set_dcc_need_cmask_elim_pred()Samuel Pitoiset2017-12-081-2/+1
* radv: remove useless checks in radv_set_{color,depth}_clear_regs()Samuel Pitoiset2017-12-081-4/+2
* radv: only re-mit the index type when it changesSamuel Pitoiset2017-12-081-10/+23
* radv: only reset command buffers that are not in the initial stateSamuel Pitoiset2017-12-081-4/+9
* radv: track different status of a command bufferSamuel Pitoiset2017-12-081-0/+6
* radv: only reset command buffers when the allocation failsSamuel Pitoiset2017-12-011-4/+14
* radv: do not store gfx9_epitch in radv_color_buffer_infoSamuel Pitoiset2017-11-301-3/+4
* Revert "radv: remove unnecessary memset() in radv_AllocateCommandBuffers()"Samuel Pitoiset2017-11-241-0/+3
* radv: only load needed depth clear regs for fast depth clearsSamuel Pitoiset2017-11-201-2/+12
* radv: do not add the image BO in radv_set_depth_clear_regs()Samuel Pitoiset2017-11-201-2/+0
* radv: remove useless check in radv_set_depth_clear_regs()Samuel Pitoiset2017-11-201-1/+1
* radv: add the vertex buffers BO to the list at bind timeSamuel Pitoiset2017-11-151-3/+3
* radv: replace vb_dirty with RADV_CMD_DIRTY_VERTEX_BUFFERSamuel Pitoiset2017-11-151-3/+4
* radv: do not add the image BO in radv_set_dcc_need_cmask_elim_pred()Samuel Pitoiset2017-11-151-2/+0
* radv: do not add the image BO in radv_set_color_clear_regs()Samuel Pitoiset2017-11-151-2/+0
* radv: add unlikely() around radv_save_descriptors()Samuel Pitoiset2017-11-131-1/+1
* radv: optimize calling radv_cmd_buffer_trace_emit()Samuel Pitoiset2017-11-131-5/+5
* radv: optimize calling radv_save_pipeline()Samuel Pitoiset2017-11-131-5/+5
* radv: use vk_zalloc instead of vk_alloc+memsetSamuel Pitoiset2017-11-131-3/+2
* radv: remove unnecessary memset() in radv_AllocateCommandBuffers()Samuel Pitoiset2017-11-131-3/+0
* radv: remove useless initializations in radv_create_cmd_buffer()Samuel Pitoiset2017-11-131-2/+0
* radv: use vk_error() everywhere an error is returnedSamuel Pitoiset2017-11-131-1/+1
* radv: make radv_emit_framebuffer_state() staticSamuel Pitoiset2017-11-131-1/+1
* radv: prefetch VBO descriptors at the right placeSamuel Pitoiset2017-11-131-0/+16
* radv: add radv_emit_prefetch_TC_L2_async() helperSamuel Pitoiset2017-11-131-2/+9
* radv: rename radv_emit_shaders_prefetch() to radv_emit_prefetch()Samuel Pitoiset2017-11-131-6/+6
* radv: emit esgs ring size in one place.Dave Airlie2017-11-131-7/+7
* radv: move calculating vs out info regs into pipeline.Dave Airlie2017-11-131-21/+8
* radv: wrap cs_add_buffer in an inline. (v2)Dave Airlie2017-11-061-22/+22
* radv: when loading regs no need to add bufferDave Airlie2017-11-061-2/+0
* radv: pre-calculate user_data_0 registers and store in pipelineDave Airlie2017-11-061-7/+7
* radv: move descriptor sets out of cmd_state.Dave Airlie2017-11-061-15/+14
* radv: add helper for setting a descriptor.Dave Airlie2017-11-061-8/+12
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