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path: root/src/amd/vulkan/radv_cmd_buffer.c
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* radv: make radv_emit_framebuffer_state() staticSamuel Pitoiset2017-11-131-1/+1
* radv: prefetch VBO descriptors at the right placeSamuel Pitoiset2017-11-131-0/+16
* radv: add radv_emit_prefetch_TC_L2_async() helperSamuel Pitoiset2017-11-131-2/+9
* radv: rename radv_emit_shaders_prefetch() to radv_emit_prefetch()Samuel Pitoiset2017-11-131-6/+6
* radv: emit esgs ring size in one place.Dave Airlie2017-11-131-7/+7
* radv: move calculating vs out info regs into pipeline.Dave Airlie2017-11-131-21/+8
* radv: wrap cs_add_buffer in an inline. (v2)Dave Airlie2017-11-061-22/+22
* radv: when loading regs no need to add bufferDave Airlie2017-11-061-2/+0
* radv: pre-calculate user_data_0 registers and store in pipelineDave Airlie2017-11-061-7/+7
* radv: move descriptor sets out of cmd_state.Dave Airlie2017-11-061-15/+14
* radv: add helper for setting a descriptor.Dave Airlie2017-11-061-8/+12
* radv: move vertex binding out of cmd state.Dave Airlie2017-11-061-3/+3
* radv: free attachments on end command buffer.Dave Airlie2017-11-061-0/+2
* radv: Optimize calling radv_save_descriptors.Bas Nieuwenhuizen2017-11-041-4/+2
* radv: use the optimal packets order for dispatch callsSamuel Pitoiset2017-11-021-8/+53
* radv: make radv_bind_descriptor_set() staticSamuel Pitoiset2017-11-021-3/+3
* radv: bail out when binding the same vertex buffersSamuel Pitoiset2017-10-311-2/+16
* radv: bail out when binding the same index bufferSamuel Pitoiset2017-10-311-0/+9
* radv: make radv_fill_buffer() return the needed flush bitsSamuel Pitoiset2017-10-271-24/+22
* radv: add support for local bos. (v3)Dave Airlie2017-10-261-1/+2
* radv: only copy the dynamic states that changedSamuel Pitoiset2017-10-261-23/+69
* radv: store the dynamic state mask into radv_dynamic_stateSamuel Pitoiset2017-10-261-5/+5
* radv: only emit the depth bounds test values when set dynamicallySamuel Pitoiset2017-10-261-2/+1
* radv: only emit dfsm packets if dfsm is allowed.Dave Airlie2017-10-241-3/+3
* radv: Don't explicitly reference vertex shader for draw_id.Bas Nieuwenhuizen2017-10-211-1/+1
* radv: Don't reset cmd_buffer->state.dirty.Bas Nieuwenhuizen2017-10-211-2/+0
* radv: Correctly detect changed shaders for vertex descriptors.Bas Nieuwenhuizen2017-10-211-6/+6
* radv: use optimal packet order for drawsSamuel Pitoiset2017-10-201-17/+79
* radv: add radv_emit_shaders_prefetch()Samuel Pitoiset2017-10-201-12/+19
* radv: add radv_emit_shader_prefetch()Samuel Pitoiset2017-10-201-25/+23
* radv: don't flush the VS when srcStageMask == TOP_OF_PIPE_BITFredrik Höglund2017-10-201-2/+1
* radv: mark total_count as MAYBE_UNUSED in CmdSet{Viewport,Scissor}Samuel Pitoiset2017-10-201-2/+2
* radv: rename radv_cmd_buffer_flush_state() to radv_draw()Samuel Pitoiset2017-10-201-59/+51
* radv: emit primitive restart from radv_emit_draw_registers()Samuel Pitoiset2017-10-201-29/+30
* radv: add radv_emit_draw_registers()Samuel Pitoiset2017-10-201-12/+34
* radv: refactor indirect draws (+count buffer) with radv_draw_infoSamuel Pitoiset2017-10-201-103/+48
* radv: refactor indirect draws with radv_draw_infoSamuel Pitoiset2017-10-201-75/+133
* radv: refactor simple and indexed draws with radv_draw_infoSamuel Pitoiset2017-10-201-68/+118
* radv: re-emit VGT_INDEX_TYPE because non-indexed draws overwrite itSamuel Pitoiset2017-10-201-2/+11
* radv: clear the dirty flags in the corresponding emit helpersSamuel Pitoiset2017-10-201-2/+8
* radv: rename RADV_CMD_DIRTY_RENDER_TARGETS to RADV_CMD_DIRTY_FRAMEBUFFERSamuel Pitoiset2017-10-201-2/+2
* radv: move DB_COUNT_CONTROL initialization to si_emit_config()Samuel Pitoiset2017-10-201-1/+0
* radv: calculate and emit GFX9 GS registers to pipeline state.Bas Nieuwenhuizen2017-10-201-5/+20
* radv: Only emit TES when it exists.Bas Nieuwenhuizen2017-10-201-4/+6
* radv: fixup tess eval shader when combined.Dave Airlie2017-10-201-0/+5
* radv: Add GFX9 HS emitting code.Bas Nieuwenhuizen2017-10-191-5/+16
* radv: Remove remaining hard coded references to VS.Bas Nieuwenhuizen2017-10-191-5/+14
* radv: Update GFX9 user data regs for GS/tess.Bas Nieuwenhuizen2017-10-191-7/+7
* radv: reset dirty flags after flushing all statesSamuel Pitoiset2017-10-181-2/+2
* radv: do not re-emit the index buffer for every draw callSamuel Pitoiset2017-10-181-29/+28