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* aco: improve validation checks for readlane/writelaneSamuel Pitoiset2020-06-221-10/+30
| | | | | | | | | | | | This allows literals for the lane select on GFX10+. The doc says that is should be a SGPR or a constant but VOP3 on GFX10+ allows literals. Some later validation code checks if literals are allowed anyways. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5010>
* aco: fix validation of opsel when set for the definitionRhys Perry2020-06-171-4/+4
| | | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5521>
* aco: fix sub-dword opsel/sdwa checksRhys Perry2020-06-171-3/+3
| | | | | | | | | These should all check if the operand has a regclass. The opsel check should also be skipped post-RA. Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5504>
* aco: don't allow SGPRs on logical phisDaniel Schürmann2020-06-161-1/+1
| | | | | | | aco_validate() is called after phi lowering, now. Reviewed-by: Rhys Perry <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5496>
* aco: validate sub-dword pseudo instructionsRhys Perry2020-06-151-0/+18
| | | | | | | | No fossil-db changes. Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5245>
* aco: use Info::definition_size instead of definition's regclassRhys Perry2020-06-101-1/+1
| | | | | | | | | | | 16-bit abs/neg creates v_xor_b32/v_and_b32 with v2b definitions. These instructions never do partial writes without SDWA. No shader-db changes. Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5040>
* aco: validate instructions reading/writing upper halves/bytesRhys Perry2020-06-101-12/+151
| | | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5040>
* aco: validate 8-bit/16-bit VGPR operands for readfirstlane/readlane/writelaneSamuel Pitoiset2020-05-211-1/+1
| | | | | | | | | | I would expect it to just work as intended and other solutions, like v_and_b32 to make sure the upper bits are 0, might have some overhead. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Rhys Perry <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4494>
* aco: don't allow unaligned subdword accesses on GFX6/7Daniel Schürmann2020-05-211-9/+11
| | | | | | | | There are no SDWA instructions which means that only full registers can be accessed. Reviewed-by: Rhys Perry <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5070>
* aco: validate v_interp_*_f16 as VOP3 instructions instead of VINTRPSamuel Pitoiset2020-05-191-2/+13
| | | | | | | | | 16-bit interp instructions are considered VINTRP by the compiler but they are emitted as VOP3 by the assembler. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Rhys Perry <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4966>
* aco: fix sub-dword overwrite check in RA validatorRhys Perry2020-04-281-1/+1
| | | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4772>
* aco: fix sub-dword out-of-bounds check in RA validatorRhys Perry2020-04-281-2/+2
| | | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4772>
* aco: allocate full register for subdword definitions if HW doesn't support itDaniel Schürmann2020-04-221-3/+15
| | | | | Reviewed-by: Rhys Perry <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4573>
* aco: fix p_extract_vector validationRhys Perry2020-04-141-1/+1
| | | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4507>
* aco: validate RA of subdword assignmentsDaniel Schürmann2020-04-031-21/+22
| | | | | | Reviewed-by: Rhys Perry <[email protected]> Reviewed-By: Timur Kristóf <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
* aco: validate uninitialized operandsDaniel Schürmann2020-04-031-0/+2
| | | | | | Reviewed-by: Rhys Perry <[email protected]> Reviewed-By: Timur Kristóf <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
* aco: validate register alignment of subdword operands and definitionsDaniel Schürmann2020-04-031-0/+8
| | | | | | Reviewed-by: Rhys Perry <[email protected]> Reviewed-By: Timur Kristóf <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
* aco: validate p_create_vector with subdword elements properlyDaniel Schürmann2020-04-031-2/+3
| | | | | | | | Also allows for undef operands Reviewed-by: Rhys Perry <[email protected]> Reviewed-By: Timur Kristóf <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
* aco: print and validate opselRhys Perry2020-04-031-0/+7
| | | | | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Reviewed-By: Timur Kristóf <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
* aco: add SDWA_instructionRhys Perry2020-04-031-2/+50
| | | | | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Reviewed-By: Timur Kristóf <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4002>
* aco: add a late kill flagRhys Perry2020-03-161-1/+12
| | | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3914>
* aco: only reserve sgprs for vcc if it's usedRhys Perry2020-03-051-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pipeline-db (Vega): Totals: SGPRS: 5186302 -> 5075616 (-2.13 %) VGPRS: 3704580 -> 3704580 (0.00 %) Spilled SGPRs: 144859 -> 144859 (0.00 %) Spilled VGPRs: 0 -> 0 (0.00 %) Scratch size: 4124 -> 4124 (0.00 %) dwords per thread Code Size: 247315944 -> 247315944 (0.00 %) bytes LDS: 1311 -> 1311 (0.00 %) blocks Max Waves: 674560 -> 674562 (0.00 %) Totals from affected shaders: SGPRS: 536992 -> 426306 (-20.61 %) VGPRS: 356404 -> 356404 (0.00 %) Spilled SGPRs: 0 -> 0 (0.00 %) Spilled VGPRs: 0 -> 0 (0.00 %) Scratch size: 0 -> 0 (0.00 %) dwords per thread Code Size: 8498748 -> 8498748 (0.00 %) bytes LDS: 8 -> 8 (0.00 %) blocks Max Waves: 113832 -> 113834 (0.00 %) There are some small code size changes in a few RotTR shaders and a small increase in max_waves in two Detroit: Become Human shaders. Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3906> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3906>
* aco: fix image_atomic_cmp_swapDaniel Schürmann2020-01-311-1/+2
| | | | | | | Fixes: 71440ba0f5512fe455be66ca48b253ecc37478a9 ('aco: reorder VMEM operands in ACO IR') Reviewed-by: Rhys Perry <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3652> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3652>
* aco: reorder VMEM operands in ACO IRDaniel Schürmann2020-01-291-6/+20
| | | | | | | | | | | For all VMEM instructions, the resource constant is now in operands[0]. For MIMG instructions, the sampler shares operands[1] with write data in case this instruction writes memory. Moving the VADDR to be the last operand for MIMG is the first step to support Navi NSA encoding. Reviewed-by: Rhys Perry <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3602>
* aco: update IR validatorRhys Perry2020-01-141-30/+41
| | | | | | | | GFX10 increased the constant bus limit and allowed literals on VOP3 Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2883>
* aco: split read/writelane opcode into VOP2/VOP3 version for SI/CIDaniel Schürmann2019-12-071-3/+12
| | | | Reviewed-by: Rhys Perry <[email protected]>
* aco/wave32: Use lane mask regclass for exec/vcc.Timur Kristóf2019-12-041-1/+1
| | | | | | | | | Currently all usages of exec and vcc are hardcoded to use s2 regclass. This commit makes it possible to use s1 in wave32 mode and s2 in wave64 mode. Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
* aco: validate the CFGRhys Perry2019-12-021-0/+31
| | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
* aco: Allow literals on VOP3 instructions.Rhys Perry2019-10-101-1/+3
| | | | | | Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Reviewed-By: Timur Kristóf <[email protected]>
* android: aco: fix undefined template 'std::__1::array' build errorsMauro Rossi2019-09-281-0/+1
| | | | | | | | | | | | | | Fixes a few building errors similar to the following: In file included from external/mesa/src/amd/compiler/aco_instruction_selection.cpp:26: In file included from external/libcxx/include/algorithm:639: external/libcxx/include/utility:321:9: error: implicit instantiation of undefined template 'std::__1::array<aco::Temp, 4>' _T2 second; ^ Fixes: 93c8ebf ("aco: Initial commit of independent AMD compiler") Signed-off-by: Mauro Rossi <[email protected]>
* aco: Initial commit of independent AMD compilerDaniel Schürmann2019-09-191-0/+460
ACO (short for AMD Compiler) is a new compiler backend with the goal to replace LLVM for Radeon hardware for the RADV driver. ACO currently supports only VS, PS and CS on VI and Vega. There are some optimizations missing because of unmerged NIR changes which may decrease performance. Full commit history can be found at https://github.com/daniel-schuermann/mesa/commits/backend Co-authored-by: Daniel Schürmann <[email protected]> Co-authored-by: Rhys Perry <[email protected]> Co-authored-by: Bas Nieuwenhuizen <[email protected]> Co-authored-by: Connor Abbott <[email protected]> Co-authored-by: Michael Schellenberger Costa <[email protected]> Co-authored-by: Timur Kristóf <[email protected]> Acked-by: Samuel Pitoiset <[email protected]> Acked-by: Bas Nieuwenhuizen <[email protected]>
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