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* ac/shader: scan output usage mask for VS and TESSamuel Pitoiset2018-03-062-0/+22
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* ac: pass the unmodified number of components to load gs inputsTimothy Arceri2018-03-061-2/+2
| | | | | | | | | | | Currently both users of this would overflow an array when the input was a dual slot double as they expected the number of components to be a max of 4. Since we pass the type we can just let the functions handle doubles in a way they choose. Reviewed-by: Dave Airlie <[email protected]>
* ac: add ac_build_fsign()Samuel Pitoiset2018-03-053-25/+28
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* ac: add ac_build_isign()Samuel Pitoiset2018-03-053-24/+28
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* ac: add ac_build_fract()Samuel Pitoiset2018-03-053-26/+34
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timothy Arceri <[email protected]>
* ac/radv: move lower_indirect_derefs() to ac_nir_to_llvm.cTimothy Arceri2018-03-052-0/+39
| | | | | | | Until llvm handles indirects better we will need to use these workarounds in the radeonsi backend also. Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: fix nir_intrinsic_shared_atomic_comp_swap handlingTimothy Arceri2018-03-021-1/+1
| | | | | | | | | | Following on from 49879f377870 this makes sure we use the correct src index. Fixes cts test: KHR-GL46.compute_shader.atomic-case3 Reviewed-by: Dave Airlie <[email protected]>
* ac/nir: fix shared atomic operations.Dave Airlie2018-03-011-5/+5
| | | | | | | | | | | The nir->llvm conversion was using the wrong srcs. Fixes: tests/spec/arb_compute_shader/execution/shared-atomics.shader_test Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Timothy Arceri <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* ac/nir: don't apply slice rounding on txf_msDave Airlie2018-03-011-1/+1
| | | | | | | | | | | This matches the tgsi code. Fixes arb_texture_multisample texelFetch piglit tests. Reviewed-by: Timothy Arceri <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Fixes: f4e499ec7914 (radv: add initial non-conformant radv vulkan driver) Signed-off-by: Dave Airlie <[email protected]>
* ac/shader: move scanning some info about input PS declarationsSamuel Pitoiset2018-02-284-9/+18
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Dave Airlie <[email protected]>
* ac/radv: move load base vertex abi setup to vertex shader.Dave Airlie2018-02-281-1/+1
| | | | | | | | | This was segfaulting: dEQP-VK.memory.pipeline_barrier.host_write_index_buffer.1024 Fixes: 8de6f797070 (ac/radeonsi: add load_base_vertex() to the abi) Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* ac/shader: fix vertex input with components.Dave Airlie2018-02-281-1/+1
| | | | | | | | | | This fixes: dEQP-VK.glsl.440.linkage.varying.component.* Fixes: 1c57a6da5e3 (ac/shader: scan vertex inputs usage mask) Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* ac: implement nir_op_ldexpTimothy Arceri2018-02-281-0/+7
| | | | Reviewed-by: Marek Olšák <[email protected]>
* ac: fix nir_op_fdd{x,y} handlingTimothy Arceri2018-02-281-2/+2
| | | | | | | | | | | | | | | radeonsi, i965 and anv all treat fdd{x,y} opcodes the same as fdd{x,y}_coarse by default. The SPIR-V spec lets the implementation decide how it should be handled and radv was previously going for the higher quality option. Here we change the shared amd code to match how nir_op_fdd{x,y} is expected to be handled by the other NIR drivers. Fixes piglit test: ./bin/arb_shader_texture_lod-texgrad -auto Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac/radeonsi: add load_base_vertex() to the abiTimothy Arceri2018-02-282-1/+9
| | | | | | | | | | Fixes the following piglit tests: ./bin/arb_shader_draw_parameters-basevertex basevertex -auto -fbo ./bin/arb_shader_draw_parameters-basevertex basevertex-baseinstance -auto -fbo Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac: add support for handling nir_intrinsic_load_vertex_idTimothy Arceri2018-02-281-0/+4
| | | | | | | This will be used by radeonsi. Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac: fix f2b and i2b for doublesTimothy Arceri2018-02-281-2/+4
| | | | | | | | Without this llvm was asserting in debug builds. V2: use LLVMConstNull() Reviewed-by: Samuel Pitoiset <[email protected]>
* ac/nir: clean up a hack about rounding 2nd coord componentSamuel Pitoiset2018-02-271-3/+5
| | | | | | | | It's basically just the opposite, and it only makes sense to round the layer for 2D texture arrays. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: use ordered float comparisons except for not equalSamuel Pitoiset2018-02-261-3/+3
| | | | | | | | | | | | | | | | | | Original patch from Timothy Arceri, I have just fixed the not equal case locally. This fixes one important rendering issue in Wolfenstein 2 (the cutscene transition issue). RadeonSI uses the same ordered comparisons, so I guess that what we should do as well. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104302 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104905 Cc: <[email protected]> Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Connor Abbott <[email protected]>
* ac: make use of ac_get_llvm_num_components() helperTimothy Arceri2018-02-261-5/+1
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* ac/nir: remove emission of nir_op_fpowSamuel Pitoiset2018-02-221-4/+0
| | | | | | | fpow is now lowered at NIR level. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: set GLC=1 for load/store of coherent/volatile imagesSamuel Pitoiset2018-02-221-3/+4
| | | | | | | | | | This disables persistence accross wavefronts. F1 2017 and Wolfenstein 2 appear to use some coherent images but this patch doesn't seem to change anything. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/radeonsi: pass type to load_tess_varyings()Timothy Arceri2018-02-222-2/+14
| | | | | | We need this to be able to load 64bit varyings. Reviewed-by: Marek Olšák <[email protected]>
* amd/common:add uvd hevc enc support check in hw queryJames Zhu2018-02-212-1/+12
| | | | | | | Based on amdgpu hardware query information to check if UVD hevc enc support Signed-off-by: James Zhu <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ac/nir: add glsl_is_array_image() helperSamuel Pitoiset2018-02-211-23/+18
| | | | | | | For consistency. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: set the DA field when performing atomics on 3D imagesSamuel Pitoiset2018-02-211-1/+2
| | | | | | | This doesn't fix anything known but it should definitely be set. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radv/tess: don't need to look in constant for vertices_per_patchDave Airlie2018-02-211-1/+4
| | | | | | | This just avoids passing this value via user sgprs. Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* ac/radv: cleanup some tcs output values accessDave Airlie2018-02-211-2/+8
| | | | | | | Just consolidates some code to make it easier to change. Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* ac/radv: remove total_vertices variableDave Airlie2018-02-211-4/+3
| | | | | | | This just removes an unneeded variable. Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* ac/radv: don't mark tess inner as used if we don't use it.Dave Airlie2018-02-211-8/+11
| | | | | | | | This just avoids marking it as a used output if we don't actually use it. Reviewed-by: Samuel Pitoiset <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* ac/nir: to integer the args to bcsel.Dave Airlie2018-02-201-1/+2
| | | | | | | | | | | | | dEQP-VK.tessellation.invariance.outer_edge_symmetry.triangles_equal_spacing_ccw was hitting an llvm assert due to one value being an int and the other a float. This just casts both values to integer and fixes the test. Fixes: dEQP-VK.tessellation.invariance.outer_edge_symmetry.triangles_equal_spacing_ccw Cc: [email protected] Reviewed-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* ac/nir: move ac_declare_lds_as_pointer() outside of the switchSamuel Pitoiset2018-02-201-5/+7
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* radeonsi: implement 32-bit pointers in user data SGPRs (v2)Marek Olšák2018-02-172-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | User SGPRs changes: VS: 14 -> 9 TCS: 14 -> 10 TES: 10 -> 6 GS: 8 -> 4 GSCOPY: 2 -> 1 PS: 9 -> 5 Merged VS-TCS: 24 -> 16 Merged VS-GS: 18 -> 11 Merged TES-GS: 18 -> 11 SGPRS: 2170102 -> 2158430 (-0.54 %) VGPRS: 1645656 -> 1641516 (-0.25 %) Spilled SGPRs: 9078 -> 8810 (-2.95 %) Spilled VGPRs: 130 -> 114 (-12.31 %) Scratch size: 1508 -> 1492 (-1.06 %) dwords per thread Code Size: 52094872 -> 52692540 (1.15 %) bytes Max Waves: 371848 -> 372723 (0.24 %) v2: - the shader cache needs to take address32_hi into account - set amdgpu-32bit-address-high-bits Reviewed-by: Samuel Pitoiset <[email protected]> (v1)
* ac: query high bits of 32-bit address spaceMarek Olšák2018-02-172-0/+8
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* ac/nir: do not reserve user SGPRs for unused descriptor setsSamuel Pitoiset2018-02-151-3/+6
| | | | | | | | | | | | | In theory this might lead to corruption if we bind a descriptor set which is unused, because LLVM is smart and it can re-use unused user SGPRs. In practice, this doesn't seem to fix anything. As a side effect, this will reduce the number of emitted SH_REG packets. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/shader: fix gathering of desc_set_used_maskSamuel Pitoiset2018-02-151-1/+1
| | | | | | | This was quite wrong. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/shader: be a little smarter when scanning vertex buffersSamuel Pitoiset2018-02-151-1/+11
| | | | | | | | | | Although meta shaders don't use any vertex buffers, there is no behaviour change but I think it's better to do this. Though, this saves two user SGPRs for push constants inlining or something else. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: implement nir_intrinsic_image_samplesTimothy Arceri2018-02-151-0/+23
| | | | | | | Fixes cts test: KHR-GL45.shader_texture_image_samples_tests.image_functional_test Reviewed-by: Marek Olšák <[email protected]>
* ac/nir_to_llvm: fix image size for arrays of arraysTimothy Arceri2018-02-151-6/+4
| | | | | | | Fixes cts test: KHR-GL44.shader_image_size.advanced-changeSize Reviewed-by: Marek Olšák <[email protected]>
* ac/nir: rename nir_to_llvm_context to radv_shader_contextSamuel Pitoiset2018-02-141-74/+74
| | | | | | | There is still more to do in that area, but it's a good start. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: remove nir_to_llvm_context from ac_nir_translate()Samuel Pitoiset2018-02-142-4/+3
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: remove nir_to_llvm_context::nir linkSamuel Pitoiset2018-02-141-11/+0
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: move the outputs array to the ABISamuel Pitoiset2018-02-142-25/+26
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/shader: scan force_persampleSamuel Pitoiset2018-02-142-3/+17
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac: Use the renumbered const address space for LLVM 7.Bas Nieuwenhuizen2018-02-141-1/+2
| | | | | | | The LLVM AMDGPU backend decided to renumber the constant address space .... Reviewed-by: Samuel Pitoiset <[email protected]>
* ac/nir: add nir_intrinsic_{load,store}_shared supportTimothy Arceri2018-02-131-0/+46
| | | | | Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* ac/nir_to_llvm: add support for nir_intrinsic_shared_atomic_*Timothy Arceri2018-02-131-6/+42
| | | | | Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* ac/nir: Fix compiler warning about uninitialized dw_addr.Eric Anholt2018-02-121-1/+1
| | | | | | | | Even switching the def's condition to be the same chip revision check as the use, the compiler doesn't figure it out. Just NULL-init it. Fixes: ec53e527421d ("ac/nir: Add ES output to LDS for GFX9.") Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: remove backlink to nir_to_llvm_contextSamuel Pitoiset2018-02-121-6/+0
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
* ac/nir: remove nir_to_llvm_context::moduleSamuel Pitoiset2018-02-121-13/+10
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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