| Commit message (Collapse) | Author | Age | Files | Lines |
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Fixes CTS tests:
KHR-GL40.gpu_shader_fp64.builtin.frexp_double
KHR-GL40.gpu_shader_fp64.builtin.frexp_dvec2
KHR-GL40.gpu_shader_fp64.builtin.frexp_dvec3
KHR-GL40.gpu_shader_fp64.builtin.frexp_dvec4
And piglit test:
tests/spec/arb_gpu_shader_fp64/execution/built-in-functions/fs-frexp-dvec4.shader_test
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Reviewed-by: Marek Olšák <[email protected]>
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Tested-by: Dieter Nützel <[email protected]>
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I was going to have to add another parameter to this monster,
so we should just pass the nir_variable in, I can't find any
reason this would be a bad idea.
This needed for the next fix.
Fixes: 94f9591995 (radv/ac: add support for TCS/TES inputs/outputs.)
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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Also replace ac_ by radv_.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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This is RADV specific code.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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Also replace ac_ by radv_.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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Now the "ac/nir" prefix will really be the shared code between
RadeonSI and RADV, that might avoid confusions in the future.
Signed-off-by: Samuel Pitoiset <[email protected]>
Acked-by: Bas Nieuwenhuizen <[email protected]>
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Required in order to move all RADV specific code outside of ac/nir.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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Required in order to move all RADV specific code outside of ac/nir.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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Required in order to move all RADV specific code outside of ac/nir.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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This allows to remove the ac_nir_context dependency.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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As well as si_build_alloca_undef() and drop the si prefix.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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Bit 0 enables VSRC0 (R in low bits, G high) and bit 2 enables
VSRC1 (B in low bits, A high).
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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Reviewed-by: Alex Deucher <[email protected]>
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Cc: 17.3 18.0 <[email protected]>
Reviewed-by: Christian König <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
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Null exports should only be needed when no other exports are
emitted. This removes a bunch of 'exp null off, off, off, off done vm'.
Affected games are Dota 2 and Wolfenstein 2, not sure if that
really helps, but code size is decreasing there.
Polaris10:
Totals from affected shaders:
SGPRS: 8216 -> 8216 (0.00 %)
VGPRS: 7072 -> 7072 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Code Size: 454968 -> 453896 (-0.24 %) bytes
Max Waves: 772 -> 772 (0.00 %)
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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This should fix a regression with Rocket League grass rendering
on the NIR backend.
Reviewed-by: Marek Olšák <[email protected]>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104717
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These helpers insert the basic block in the same order as they
appear in NIR making it easier to follow LLVM IR dumps. The helpers
also insert more useful labels onto the blocks.
TGSI use the line number of the corresponding opcode in the TGSI
dump as the label id, here we use the corresponding block index
from NIR.
Reviewed-by: Marek Olšák <[email protected]>
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These have been ported over from radeonsi.
Reviewed-by: Marek Olšák <[email protected]>
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Co-authored-by: Dave Airlie <[email protected]>
Signed-off-by: Daniel Schürmann <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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Deliberately not implementing workgroup scopes as that is not needed
for core vulkan.
Reviewed-by: Dave Airlie <[email protected]>
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The old vote_eq implementation supported only booleans, but now
we have to support arbitrary values, so use the read_first_invocation
intrinsic + ballot.
I took this as an opportunity to figure out how easy it was to do this
in nir instead of in the nir_to_llvm pass, and it actually turned out
pretty okay IMO. Only creating the pass is some extra code.
Reviewed-by: Dave Airlie <[email protected]>
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The SPIR-V extension wants us to be able to do an AllEqual on any vector
or scalar type. This has two implications:
1) We need to be able to handle vectors so we switch the vote_eq
intrinsics to be vectorized intrinsics.
2) We need to handle floats which have different behavior with respect
to +-0, NaN, etc. than the integer variant so we need two variants.
Reviewed-by: Lionel Landwerlin <[email protected]>
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The old function treats high values as negative, which LLVM interprets as 0.
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If it's zero but put it in args we still end up consuming a
register for it.
This fixes some spilling in the NIR paths in Dirt Rally that
isn't seen with TGSI.
Reviewed-by: Timothy Arceri <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Dave Airlie <[email protected]>
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Imported from RadeonSI.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Dave Airlie <[email protected]>
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This allows us to generate, for example,
"exp param0 v0, off, off, off" if only the first channel is needed.
Not sure if this improves performance but it's worth trying.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Dave Airlie <[email protected]>
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When the mask is not 0xf we need to update the number of
enabled channels, otherwise the hardware won't emit the
components that are combined.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Dave Airlie <[email protected]>
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Currently, it's always 0xf but an upcoming patch will reduce the
number of channels for parameters export.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Dave Airlie <[email protected]>
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Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Dave Airlie <[email protected]>
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Currently both users of this would overflow an array when the
input was a dual slot double as they expected the number of
components to be a max of 4.
Since we pass the type we can just let the functions handle
doubles in a way they choose.
Reviewed-by: Dave Airlie <[email protected]>
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Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Timothy Arceri <[email protected]>
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Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Timothy Arceri <[email protected]>
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Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Timothy Arceri <[email protected]>
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Until llvm handles indirects better we will need to use these
workarounds in the radeonsi backend also.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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Following on from 49879f377870 this makes sure we use the correct
src index.
Fixes cts test:
KHR-GL46.compute_shader.atomic-case3
Reviewed-by: Dave Airlie <[email protected]>
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The nir->llvm conversion was using the wrong srcs.
Fixes:
tests/spec/arb_compute_shader/execution/shared-atomics.shader_test
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Reviewed-by: Timothy Arceri <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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This matches the tgsi code.
Fixes arb_texture_multisample texelFetch piglit tests.
Reviewed-by: Timothy Arceri <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Fixes: f4e499ec7914 (radv: add initial non-conformant radv vulkan driver)
Signed-off-by: Dave Airlie <[email protected]>
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Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Dave Airlie <[email protected]>
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This was segfaulting:
dEQP-VK.memory.pipeline_barrier.host_write_index_buffer.1024
Fixes: 8de6f797070 (ac/radeonsi: add load_base_vertex() to the abi)
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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This fixes:
dEQP-VK.glsl.440.linkage.varying.component.*
Fixes: 1c57a6da5e3 (ac/shader: scan vertex inputs usage mask)
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Reviewed-by: Samuel Pitoiset <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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