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* ac/nir: fix translation of nir_op_fsign for doublesTimothy Arceri2018-01-121-7/+19
* ac: add f64_0 to the llvm build contextTimothy Arceri2018-01-122-0/+2
* ac/nir: fix translation of nir_op_frcp for doublesTimothy Arceri2018-01-121-1/+2
* ac/nir: fix translation of nir_op_frsq for doublesTimothy Arceri2018-01-121-1/+2
* ac: add f64_1 to the llvm build contextTimothy Arceri2018-01-122-0/+2
* ac: add load_patch_vertices_in() to the abiTimothy Arceri2018-01-112-1/+12
* ac/nir: Sanitize location_frac for local variables.Bas Nieuwenhuizen2018-01-111-0/+1
* amd/common: use ac_build_buffer_load() for emitting UBO loadsSamuel Pitoiset2018-01-101-14/+3
* amd/common: import get_{load,store}_intr_attribs() from RadeonSISamuel Pitoiset2018-01-102-10/+20
* amd/common: bump the number of available user SGPRS to 32 on GFX9Samuel Pitoiset2018-01-101-1/+3
* amd/common: do not rely on the pipeline for the push constants logicSamuel Pitoiset2018-01-103-9/+9
* amd/common: determine the ES type (VS or TES) for the GS on GFX9Samuel Pitoiset2018-01-102-0/+9
* ac: rework emit_barrier() to not segfault on radeonsiTimothy Arceri2018-01-091-9/+8
* ac: add load_tess_level() to the abiTimothy Arceri2018-01-092-0/+10
* radv: get InstanceID from VGPR1 (or VGPR2 for tess) instead of VGPR3Samuel Pitoiset2018-01-081-8/+24
* ac: add ac_build_fmin/fmax helpersMarek Olšák2018-01-062-15/+22
* radv: enable denorms for 64-bit and 16-bit floatsSamuel Pitoiset2018-01-051-0/+14
* amd/common: correctly detect if we need ring buffersSamuel Pitoiset2018-01-051-7/+9
* amd/common: use ac_image_load when lod is zeroSamuel Pitoiset2018-01-051-1/+3
* ac: rework ac_llvm_extract_elem()Timothy Arceri2018-01-051-3/+3
* ac/radeonsi: add load_tess_coord() to the abiTimothy Arceri2018-01-052-7/+17
* ac/radeonsi: add tcs_rel_ids to the abiTimothy Arceri2018-01-052-8/+8
* ac: add {tcs,tes}_patch_id to the abiTimothy Arceri2018-01-052-8/+8
* ac: move some helpers to ac_llvm_build.cTimothy Arceri2018-01-053-40/+50
* ac: add store_tcs_outputs() to the abiTimothy Arceri2018-01-052-24/+51
* ac: call load_tcs_input() via the abiTimothy Arceri2018-01-051-19/+17
* ac: add load_tes_inputs() to the abiTimothy Arceri2018-01-052-22/+51
* amd/common: scan if gl_PrimitiveID is used before translating to LLVMSamuel Pitoiset2018-01-044-7/+4
* amd/common: scan if gl_InvocationID is usedSamuel Pitoiset2018-01-042-0/+4
* ac: rename has_sync_file to has_fence_to_handle.Bas Nieuwenhuizen2018-01-042-3/+3
* ac/nir: Handle loading data from compact arrays.Bas Nieuwenhuizen2018-01-041-6/+7
* ac: rename has_syncobj_wait -> has_syncobj_wait_for_submitMarek Olšák2018-01-042-2/+2
* amd/common: rework set_userdata_location() and rename to set_loc()Samuel Pitoiset2017-12-271-8/+11
* amd/common: rename set_userdata_location_shader() to set_loc_shader()Samuel Pitoiset2017-12-271-27/+30
* amd/common: replace set_userdata_location_indirect() by set_loc_desc()Samuel Pitoiset2017-12-271-11/+12
* amd/common: rename radv_define_vs_user_sgprs_phase2()Samuel Pitoiset2017-12-271-22/+33
* amd/common: rename radv_define_common_user_sgprs_phase2()Samuel Pitoiset2017-12-271-43/+50
* amd/common: rename add_user_sgpr_array_argument() to add_array_arg()Samuel Pitoiset2017-12-271-9/+5
* amd/common: replace add_sgpr_argument() by add_arg()Samuel Pitoiset2017-12-271-45/+33
* amd/common: replace add_user_sgpr_argument() by add_arg()Samuel Pitoiset2017-12-271-45/+58
* amd/common: replace add_vgpr_argument() by add_arg()Samuel Pitoiset2017-12-271-51/+60
* amd/common: add new add_arg() helper for SGPRs/VGPRs argumentsSamuel Pitoiset2017-12-271-0/+24
* amd/common: rename radv_define_common_user_sgprs_phase1()Samuel Pitoiset2017-12-271-38/+74
* amd/common: rename radv_define_vs_user_sgprs_phase1()Samuel Pitoiset2017-12-271-21/+42
* amd/common: do not try to declare input VS SGPRs for GSSamuel Pitoiset2017-12-271-1/+0
* amd/common: add declare_vs_input_vgprs() helperSamuel Pitoiset2017-12-271-14/+16
* amd/common: add declare_tes_input_vgprs() helperSamuel Pitoiset2017-12-271-8/+10
* amd/common: remove unnecessary num_user_sgprs_usedSamuel Pitoiset2017-12-271-2/+0
* amd/common: remove unnecessary user_sgpr_countSamuel Pitoiset2017-12-271-2/+0
* amd/common/radv/radeonsi: use register defines for dcc block sizes.Dave Airlie2017-12-271-0/+6
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